/*
 * SiRF Audio port driver
 *
 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
 *
 * Licensed under GPLv2 or later.
 */
#include <linux/module.h>
#include <sound/soc.h>
#include <sound/dmaengine_pcm.h>

struct sirf_audio_port {
	struct regmap *regmap;
	struct snd_dmaengine_dai_dma_data playback_dma_data;
	struct snd_dmaengine_dai_dma_data capture_dma_data;
};


static int sirf_audio_port_dai_probe(struct snd_soc_dai *dai)
{
	struct sirf_audio_port *port = snd_soc_dai_get_drvdata(dai);
	snd_soc_dai_init_dma_data(dai, &port->playback_dma_data,
			&port->capture_dma_data);
	return 0;
}

static struct snd_soc_dai_driver sirf_audio_port_dai = {
	.probe = sirf_audio_port_dai_probe,
	.name = "sirf-audio-port",
	.id = 0,
	.playback = {
		.channels_min = 2,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE,
	},
	.capture = {
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE,
	},
};

static const struct snd_soc_component_driver sirf_audio_port_component = {
	.name       = "sirf-audio-port",
};

static int sirf_audio_port_probe(struct platform_device *pdev)
{
	int ret;
	struct sirf_audio_port *port;

	port = devm_kzalloc(&pdev->dev,
			sizeof(struct sirf_audio_port), GFP_KERNEL);
	if (!port)
		return -ENOMEM;

	ret = devm_snd_soc_register_component(&pdev->dev,
			&sirf_audio_port_component, &sirf_audio_port_dai, 1);
	if (ret)
		return ret;

	platform_set_drvdata(pdev, port);
	return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
}

static const struct of_device_id sirf_audio_port_of_match[] = {
	{ .compatible = "sirf,audio-port", },
	{}
};
MODULE_DEVICE_TABLE(of, sirf_audio_port_of_match);

static struct platform_driver sirf_audio_port_driver = {
	.driver = {
		.name = "sirf-audio-port",
		.of_match_table = sirf_audio_port_of_match,
	},
	.probe = sirf_audio_port_probe,
};

module_platform_driver(sirf_audio_port_driver);

MODULE_DESCRIPTION("SiRF Audio Port driver");
MODULE_AUTHOR("RongJun Ying <Rongjun.Ying@csr.com>");
MODULE_LICENSE("GPL v2");
h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>diff</a></td><td class='form'><form class='right' method='get' action='/cgit.cgi/linux/net-next.git/log/include/sound/emu8000_reg.h'>
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<div class='path'>path: <a href='/cgit.cgi/linux/net-next.git/commit/?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>root</a>/<a href='/cgit.cgi/linux/net-next.git/commit/include?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>include</a>/<a href='/cgit.cgi/linux/net-next.git/commit/include/sound?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>sound</a>/<a href='/cgit.cgi/linux/net-next.git/commit/include/sound/emu8000_reg.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>emu8000_reg.h</a></div><div class='content'><div class='cgit-panel'><b>diff options</b><form method='get'><input type='hidden' name='id' value='6e978b22efa1db9f6e71b24440b5f1d93e968ee3'/><table><tr><td colspan='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><table summary='commit info' class='commit-info'>
<tr><th>author</th><td>Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;</td><td class='right'>2017-02-03 14:18:39 -0800</td></tr>
<tr><th>committer</th><td>Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;</td><td class='right'>2017-02-04 00:11:08 +0100</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/include/sound/emu8000_reg.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>6e978b22efa1db9f6e71b24440b5f1d93e968ee3</a> (<a href='/cgit.cgi/linux/net-next.git/patch/include/sound/emu8000_reg.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>c666f7a26b860674848949e39a610222b0723f89</a> /<a href='/cgit.cgi/linux/net-next.git/tree/include/sound/emu8000_reg.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>include/sound/emu8000_reg.h</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/include/sound/emu8000_reg.h?id=3c223c19aea85d3dda1416c187915f4a30b04b1f'>3c223c19aea85d3dda1416c187915f4a30b04b1f</a> (<a href='/cgit.cgi/linux/net-next.git/diff/include/sound/emu8000_reg.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3&amp;id2=3c223c19aea85d3dda1416c187915f4a30b04b1f'>diff</a>)</td></tr></table>
<div class='commit-subject'>cpufreq: intel_pstate: Disable energy efficiency optimization</div><div class='commit-msg'>Some Kabylake desktop processors may not reach max turbo when running in
HWP mode, even if running under sustained 100% utilization.

This occurs when the HWP.EPP (Energy Performance Preference) is set to
"balance_power" (0x80) -- the default on most systems.

It occurs because the platform BIOS may erroneously enable an
energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not
recommended to be enabled on this SKU.

On the failing systems, this BIOS issue was not discovered when the
desktop motherboard was tested with Windows, because the BIOS also
neglects to provide the ACPI/CPPC table, that Windows requires to enable
HWP, and so Windows runs in legacy P-state mode, where this setting has
no effect.

Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and
so it runs in HWP mode, exposing this incorrect BIOS configuration.

There are several ways to address this problem.

First, Linux can also run in legacy P-state mode on this system.
As intel_pstate is how Linux enables HWP, booting with
"intel_pstate=disable"
will run in acpi-cpufreq/ondemand legacy p-state mode.

Or second, the "performance" governor can be used with intel_pstate,
which will modify HWP.EPP to 0.

Or third, starting in 4.10, the
/sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference
attribute in can be updated from "balance_power" to "performance".

Or fourth, apply this patch, which fixes the erroneous setting of
MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default
configuration to function as designed.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Reviewed-by: Len Brown &lt;len.brown@intel.com&gt;
Cc: 4.6+ &lt;stable@vger.kernel.org&gt; # 4.6+
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</div><div class='diffstat-header'><a href='/cgit.cgi/linux/net-next.git/diff/?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>Diffstat</a> (limited to 'include/sound/emu8000_reg.h')</div><table summary='diffstat' class='diffstat'>