/* * SPEAr SPDIF IN controller header file * * Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef SPDIF_IN_REGS_H #define SPDIF_IN_REGS_H #define SPDIF_IN_CTRL 0x00 #define SPDIF_IN_PRTYEN (1 << 20) #define SPDIF_IN_STATEN (1 << 19) #define SPDIF_IN_USREN (1 << 18) #define SPDIF_IN_VALEN (1 << 17) #define SPDIF_IN_BLKEN (1 << 16) #define SPDIF_MODE_24BIT (8 << 12) #define SPDIF_MODE_23BIT (7 << 12) #define SPDIF_MODE_22BIT (6 << 12) #define SPDIF_MODE_21BIT (5 << 12) #define SPDIF_MODE_20BIT (4 << 12) #define SPDIF_MODE_19BIT (3 << 12) #define SPDIF_MODE_18BIT (2 << 12) #define SPDIF_MODE_17BIT (1 << 12) #define SPDIF_MODE_16BIT (0 << 12) #define SPDIF_MODE_MASK (0x0F << 12) #define SPDIF_IN_VALID (1 << 11) #define SPDIF_IN_SAMPLE (1 << 10) #define SPDIF_DATA_SWAP (1 << 9) #define SPDIF_IN_ENB (1 << 8) #define SPDIF_DATA_REVERT (1 << 7) #define SPDIF_XTRACT_16BIT (1 << 6) #define SPDIF_FIFO_THRES_16 (16 << 0) #define SPDIF_IN_IRQ_MASK 0x04 #define SPDIF_IN_IRQ 0x08 #define SPDIF_IRQ_FIFOWRITE (1 << 0) #define SPDIF_IRQ_EMPTYFIFOREAD (1 << 1) #define SPDIF_IRQ_FIFOFULL (1 << 2) #define SPDIF_IRQ_OUTOFRANGE (1 << 3) #define SPDIF_IN_STA 0x0C #define SPDIF_IN_LOCK (0x1 << 0) #endif /* SPDIF_IN_REGS_H */ /cgit.cgi/linux/net-next.git/diff/net/sunrpc/netns.h?id=383d0fca7035a12f1201277d33e8fc87c9d60c9a'>diff
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authorVenkat Reddy Talla <vreddytalla@nvidia.com>2016-11-17 23:24:35 +0530
committerMark Brown <broonie@kernel.org>2016-11-23 16:27:24 +0000
commit383d0fca7035a12f1201277d33e8fc87c9d60c9a (patch)
treebb12c78d91ab8d69ae18fbbf4033277481b277ad /net/sunrpc/netns.h
parent9a40cb0cb8b55ecfdcd3cec1381bcc46ec488588 (diff)
regulator: max77620: add support to configure MPOK
Adding support to configure regulator POK mapping bit to control nRST_IO and GPIO1 POK function. In tegra based platform which uses MAX20024 pmic, when some of regulators are configured FPS_NONE(flexible power sequencer) causes PMIC GPIO1 to go low which lead to various other rails turning off, to avoid this MPOK bit of those regulators need to be set to 0 so that PMIC GPIO1 will not go low. Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'net/sunrpc/netns.h')