#
# Ux500 SoC audio configuration
#
menuconfig SND_SOC_UX500
tristate "SoC Audio support for Ux500 platform"
depends on SND_SOC
depends on MFD_DB8500_PRCMU
help
Say Y if you want to enable ASoC-support for
any of the Ux500 platforms (e.g. U8500).
config SND_SOC_UX500_PLAT_MSP_I2S
tristate
depends on SND_SOC_UX500
config SND_SOC_UX500_PLAT_DMA
tristate "Platform - DB8500 (DMA)"
depends on SND_SOC_UX500
select SND_SOC_GENERIC_DMAENGINE_PCM
help
Say Y if you want to enable the Ux500 platform-driver.
config SND_SOC_UX500_MACH_MOP500
tristate "Machine - MOP500 (Ux500 + AB8500)"
depends on AB8500_CORE && AB8500_GPADC && SND_SOC_UX500
select SND_SOC_AB8500_CODEC
select SND_SOC_UX500_PLAT_MSP_I2S
select SND_SOC_UX500_PLAT_DMA
help
Select this to enable the MOP500 machine-driver.
This will enable platform-drivers for: Ux500
This will enable codec-drivers for: AB8500
: net-next.git
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in
HWP mode, even if running under sustained 100% utilization.
This occurs when the HWP.EPP (Energy Performance Preference) is set to
"balance_power" (0x80) -- the default on most systems.
It occurs because the platform BIOS may erroneously enable an
energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not
recommended to be enabled on this SKU.
On the failing systems, this BIOS issue was not discovered when the
desktop motherboard was tested with Windows, because the BIOS also
neglects to provide the ACPI/CPPC table, that Windows requires to enable
HWP, and so Windows runs in legacy P-state mode, where this setting has
no effect.
Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and
so it runs in HWP mode, exposing this incorrect BIOS configuration.
There are several ways to address this problem.
First, Linux can also run in legacy P-state mode on this system.
As intel_pstate is how Linux enables HWP, booting with
"intel_pstate=disable"
will run in acpi-cpufreq/ondemand legacy p-state mode.
Or second, the "performance" governor can be used with intel_pstate,
which will modify HWP.EPP to 0.
Or third, starting in 4.10, the
/sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference
attribute in can be updated from "balance_power" to "performance".
Or fourth, apply this patch, which fixes the erroneous setting of
MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default
configuration to function as designed.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Cc: 4.6+ <stable@vger.kernel.org> # 4.6+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>