#ifndef USBUSX2Y_H
#define USBUSX2Y_H
#include "../usbaudio.h"
#include "../midi.h"
#include "usbus428ctldefs.h"
#define NRURBS 2
#define URBS_AsyncSeq 10
#define URB_DataLen_AsyncSeq 32
struct snd_usX2Y_AsyncSeq {
struct urb *urb[URBS_AsyncSeq];
char *buffer;
};
struct snd_usX2Y_urbSeq {
int submitted;
int len;
struct urb *urb[0];
};
#include "usx2yhwdeppcm.h"
struct usX2Ydev {
struct usb_device *dev;
int card_index;
int stride;
struct urb *In04urb;
void *In04Buf;
char In04Last[24];
unsigned In04IntCalls;
struct snd_usX2Y_urbSeq *US04;
wait_queue_head_t In04WaitQueue;
struct snd_usX2Y_AsyncSeq AS04;
unsigned int rate,
format;
int chip_status;
struct mutex pcm_mutex;
struct us428ctls_sharedmem *us428ctls_sharedmem;
int wait_iso_frame;
wait_queue_head_t us428ctls_wait_queue_head;
struct snd_usX2Y_hwdep_pcm_shm *hwdep_pcm_shm;
struct snd_usX2Y_substream *subs[4];
struct snd_usX2Y_substream * volatile prepare_subs;
wait_queue_head_t prepare_wait_queue;
struct list_head midi_list;
struct list_head pcm_list;
int pcm_devs;
};
struct snd_usX2Y_substream {
struct usX2Ydev *usX2Y;
struct snd_pcm_substream *pcm_substream;
int endpoint;
unsigned int maxpacksize; /* max packet size in bytes */
atomic_t state;
#define state_STOPPED 0
#define state_STARTING1 1
#define state_STARTING2 2
#define state_STARTING3 3
#define state_PREPARED 4
#define state_PRERUNNING 6
#define state_RUNNING 8
int hwptr; /* free frame position in the buffer (only for playback) */
int hwptr_done; /* processed frame position in the buffer */
int transfer_done; /* processed frames since last period update */
struct urb *urb[NRURBS]; /* data urb table */
struct urb *completed_urb;
char *tmpbuf; /* temporary buffer for playback */
};
#define usX2Y(c) ((struct usX2Ydev *)(c)->private_data)
int usX2Y_audio_create(struct snd_card *card);
int usX2Y_AsyncSeq04_init(struct usX2Ydev *usX2Y);
int usX2Y_In04_init(struct usX2Ydev *usX2Y);
#define NAME_ALLCAPS "US-X2Y"
#endif
/a>diff
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of
the root of the PCIe hierarchy. For the topmost link, this points to
itself (link->root = link). For others, we copy the pointer from the
parent (link->root = link->parent->root).
Previously we recognized that Root Ports originated PCIe hierarchies, but
we treated PCI/PCI-X to PCIe Bridges as being in the middle of the
hierarchy, and when we tried to copy the pointer from link->parent->root,
there was no parent, and we dereferenced a NULL pointer:
BUG: unable to handle kernel NULL pointer dereference at 0000000000000090
IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820
Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just
like Root Ports do, so link->root for these devices should also point to
itself.
Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411
Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181
Tested-by: lists@ssl-mail.com
Tested-by: Jayachandran C. <jnair@caviumnetworks.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org # v4.2+