/* * Copied from the kernel sources: * * Copyright (C) 1999 Cort Dougan */ #ifndef _TOOLS_LINUX_ASM_POWERPC_BARRIER_H #define _TOOLS_LINUX_ASM_POWERPC_BARRIER_H /* * Memory barrier. * The sync instruction guarantees that all memory accesses initiated * by this processor have been performed (with respect to all other * mechanisms that access memory). The eieio instruction is a barrier * providing an ordering (separately) for (a) cacheable stores and (b) * loads and stores to non-cacheable memory (e.g. I/O devices). * * mb() prevents loads and stores being reordered across this point. * rmb() prevents loads being reordered across this point. * wmb() prevents stores being reordered across this point. * * *mb() variants without smp_ prefix must order all types of memory * operations with one another. sync is the only instruction sufficient * to do this. */ #define mb() __asm__ __volatile__ ("sync" : : : "memory") #define rmb() __asm__ __volatile__ ("sync" : : : "memory") #define wmb() __asm__ __volatile__ ("sync" : : : "memory") #endif /* _TOOLS_LINUX_ASM_POWERPC_BARRIER_H */ ivate-remove net-next plumbingsTobias Klauser

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path: root/include/rdma

Mode	Name	Size
-rw-r--r--	ib.h	3386	log plain
-rw-r--r--	ib_addr.h	10080	log plain
-rw-r--r--	ib_cache.h	6375	log plain
-rw-r--r--	ib_cm.h	19359	log plain
-rw-r--r--	ib_fmr_pool.h	3439	log plain
-rw-r--r--	ib_hdrs.h	4989	log plain
-rw-r--r--	ib_mad.h	27924	log plain
-rw-r--r--	ib_marshall.h	2025	log plain
-rw-r--r--	ib_pack.h	9047	log plain
-rw-r--r--	ib_pma.h	5579	log plain
-rw-r--r--	ib_sa.h	16914	log plain
-rw-r--r--	ib_smi.h	5633	log plain
-rw-r--r--	ib_umem.h	3577	log plain
-rw-r--r--	ib_umem_odp.h	5300	log plain
-rw-r--r--	ib_verbs.h	100225	log plain
-rw-r--r--	iw_cm.h	8793	log plain
-rw-r--r--	iw_portmap.h	7688	log plain
-rw-r--r--	mr_pool.h	954	log plain
-rw-r--r--	opa_port_info.h	15063	log plain
-rw-r--r--	opa_smi.h	4417	log plain