i synthesize instructions events b synthesize branches events c synthesize branches events (calls only) r synthesize branches events (returns only) x synthesize transactions events e synthesize error events d create a debug log g synthesize a call chain (use with i or x) l synthesize last branch entries (use with i or x) s skip initial number of events The default is all events i.e. the same as --itrace=ibxe In addition, the period (default 100000) for instructions events can be specified in units of: i instructions t ticks ms milliseconds us microseconds ns nanoseconds (default) Also the call chain size (default 16, max. 1024) for instructions or transactions events can be specified. Also the number of last branch entries (default 64, max. 1024) for instructions or transactions events can be specified. It is also possible to skip events generated (instructions, branches, transactions) at the beginning. This is useful to ignore initialization code. --itrace=i0nss1000000 skips the first million instructions. maclite-cleanup'>emaclite-cleanup net-next plumbingsTobias Klauser
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authorBorislav Petkov <bp@suse.de>2017-01-20 21:29:40 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-23 09:39:55 +0100
commitc26665ab5c49ad3e142e0f054ca3204f259ba09c (patch)
tree3bab11918e18e9d25ef7544dba05cdf39d1abec5 /tools/virtio/vhost_test
parent7a308bb3016f57e5be11a677d15b821536419d36 (diff)
x86/microcode/intel: Drop stashed AP patch pointer optimization
This was meant to save us the scanning of the microcode containter in the initrd since the first AP had already done that but it can also hurt us: Imagine a single hyperthreaded CPU (Intel(R) Atom(TM) CPU N270, for example) which updates the microcode on the BSP but since the microcode engine is shared between the two threads, the update on CPU1 doesn't happen because it has already happened on CPU0 and we don't find a newer microcode revision on CPU1. Which doesn't set the intel_ucode_patch pointer and at initrd jettisoning time we don't save the microcode patch for later application. Now, when we suspend to RAM, the loaded microcode gets cleared so we need to reload but there's no patch saved in the cache. Removing the optimization fixes this issue and all is fine and dandy. Fixes: 06b8534cb728 ("x86/microcode: Rework microcode loading") Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170120202955.4091-2-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'tools/virtio/vhost_test')