#ifndef ARCH_PERF_REGS_H #define ARCH_PERF_REGS_H #include #include #include void perf_regs_load(u64 *regs); #ifndef HAVE_ARCH_X86_64_SUPPORT #define PERF_REGS_MASK ((1ULL << PERF_REG_X86_32_MAX) - 1) #define PERF_REGS_MAX PERF_REG_X86_32_MAX #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32 #else #define REG_NOSUPPORT ((1ULL << PERF_REG_X86_DS) | \ (1ULL << PERF_REG_X86_ES) | \ (1ULL << PERF_REG_X86_FS) | \ (1ULL << PERF_REG_X86_GS)) #define PERF_REGS_MASK (((1ULL << PERF_REG_X86_64_MAX) - 1) & ~REG_NOSUPPORT) #define PERF_REGS_MAX PERF_REG_X86_64_MAX #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64 #endif #define PERF_REG_IP PERF_REG_X86_IP #define PERF_REG_SP PERF_REG_X86_SP static inline const char *perf_reg_name(int id) { switch (id) { case PERF_REG_X86_AX: return "AX"; case PERF_REG_X86_BX: return "BX"; case PERF_REG_X86_CX: return "CX"; case PERF_REG_X86_DX: return "DX"; case PERF_REG_X86_SI: return "SI"; case PERF_REG_X86_DI: return "DI"; case PERF_REG_X86_BP: return "BP"; case PERF_REG_X86_SP: return "SP"; case PERF_REG_X86_IP: return "IP"; case PERF_REG_X86_FLAGS: return "FLAGS"; case PERF_REG_X86_CS: return "CS"; case PERF_REG_X86_SS: return "SS"; case PERF_REG_X86_DS: return "DS"; case PERF_REG_X86_ES: return "ES"; case PERF_REG_X86_FS: return "FS"; case PERF_REG_X86_GS: return "GS"; #ifdef HAVE_ARCH_X86_64_SUPPORT case PERF_REG_X86_R8: return "R8"; case PERF_REG_X86_R9: return "R9"; case PERF_REG_X86_R10: return "R10"; case PERF_REG_X86_R11: return "R11"; case PERF_REG_X86_R12: return "R12"; case PERF_REG_X86_R13: return "R13"; case PERF_REG_X86_R14: return "R14"; case PERF_REG_X86_R15: return "R15"; #endif /* HAVE_ARCH_X86_64_SUPPORT */ default: return NULL; } return NULL; } #endif /* ARCH_PERF_REGS_H */ 2d5bcb7499b0a6f6700fe'>treecommitdiff
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authorJerome Brunet <jbrunet@baylibre.com>2017-01-20 08:20:24 -0800
committerArnd Bergmann <arnd@arndb.de>2017-01-27 16:46:42 +0100
commitfeb3cbea0946c67060e2d5bcb7499b0a6f6700fe (patch)
tree4789978854a7fd97de08f4b77f220bcd9278417b /include/dt-bindings/clock/imx21-clock.h
parent7a308bb3016f57e5be11a677d15b821536419d36 (diff)
ARM64: dts: meson-gxbb-odroidc2: fix GbE tx link breakage
OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on the Tx path). The problem seems to come from the phy Rx path, entering the LPI state. Disabling EEE advertisement on the phy prevent this feature to be negociated with the link partner and solve the issue. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings/clock/imx21-clock.h')