#ifndef BENCH_H #define BENCH_H /* * The madvise transparent hugepage constants were added in glibc * 2.13. For compatibility with older versions of glibc, define these * tokens if they are not already defined. * * PA-RISC uses different madvise values from other architectures and * needs to be special-cased. */ #ifdef __hppa__ # ifndef MADV_HUGEPAGE # define MADV_HUGEPAGE 67 # endif # ifndef MADV_NOHUGEPAGE # define MADV_NOHUGEPAGE 68 # endif #else # ifndef MADV_HUGEPAGE # define MADV_HUGEPAGE 14 # endif # ifndef MADV_NOHUGEPAGE # define MADV_NOHUGEPAGE 15 # endif #endif int bench_numa(int argc, const char **argv, const char *prefix); int bench_sched_messaging(int argc, const char **argv, const char *prefix); int bench_sched_pipe(int argc, const char **argv, const char *prefix); int bench_mem_memcpy(int argc, const char **argv, const char *prefix); int bench_mem_memset(int argc, const char **argv, const char *prefix); int bench_futex_hash(int argc, const char **argv, const char *prefix); int bench_futex_wake(int argc, const char **argv, const char *prefix); int bench_futex_wake_parallel(int argc, const char **argv, const char *prefix); int bench_futex_requeue(int argc, const char **argv, const char *prefix); /* pi futexes */ int bench_futex_lock_pi(int argc, const char **argv, const char *prefix); #define BENCH_FORMAT_DEFAULT_STR "default" #define BENCH_FORMAT_DEFAULT 0 #define BENCH_FORMAT_SIMPLE_STR "simple" #define BENCH_FORMAT_SIMPLE 1 #define BENCH_FORMAT_UNKNOWN -1 extern int bench_format; extern unsigned int bench_repeat; #endif href='/cgit.cgi/linux/net-next.git/'>summaryrefslogtreecommitdiff
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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-01-29 15:07:34 +0300
committerDavid S. Miller <davem@davemloft.net>2017-01-30 22:05:43 -0500
commit1a0bee6c1e788218fd1d141db320db970aace7f0 (patch)
tree46c4116bc8ef4a7df718516a648597d9e21c15f1 /tools/perf/pmu-events/arch/x86/westmereex/memory.json
parent63c190429020a9701b42887ac22c28f287f1762f (diff)
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/westmereex/memory.json')