#ifndef _PERF_SYS_H #define _PERF_SYS_H #include #include #include #include #include #include #include #if defined(__i386__) #define cpu_relax() asm volatile("rep; nop" ::: "memory"); #define CPUINFO_PROC {"model name"} #endif #if defined(__x86_64__) #define cpu_relax() asm volatile("rep; nop" ::: "memory"); #define CPUINFO_PROC {"model name"} #endif #ifdef __powerpc__ #define CPUINFO_PROC {"cpu"} #endif #ifdef __s390__ #define CPUINFO_PROC {"vendor_id"} #endif #ifdef __sh__ #define CPUINFO_PROC {"cpu type"} #endif #ifdef __hppa__ #define CPUINFO_PROC {"cpu"} #endif #ifdef __sparc__ #define CPUINFO_PROC {"cpu"} #endif #ifdef __alpha__ #define CPUINFO_PROC {"cpu model"} #endif #ifdef __ia64__ #define cpu_relax() asm volatile ("hint @pause" ::: "memory") #define CPUINFO_PROC {"model name"} #endif #ifdef __arm__ #define CPUINFO_PROC {"model name", "Processor"} #endif #ifdef __aarch64__ #define cpu_relax() asm volatile("yield" ::: "memory") #endif #ifdef __mips__ #define CPUINFO_PROC {"cpu model"} #endif #ifdef __arc__ #define CPUINFO_PROC {"Processor"} #endif #ifdef __metag__ #define CPUINFO_PROC {"CPU"} #endif #ifdef __xtensa__ #define CPUINFO_PROC {"core ID"} #endif #ifdef __tile__ #define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory") #define CPUINFO_PROC {"model name"} #endif #ifndef cpu_relax #define cpu_relax() barrier() #endif static inline int sys_perf_event_open(struct perf_event_attr *attr, pid_t pid, int cpu, int group_fd, unsigned long flags) { int fd; fd = syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); #ifdef HAVE_ATTR_TEST if (unlikely(test_attr__enabled)) test_attr__open(attr, pid, cpu, fd, group_fd, flags); #endif return fd; } #endif /* _PERF_SYS_H */ clude/dt-bindings?h=nds-private-remove&id=feb3cbea0946c67060e2d5bcb7499b0a6f6700fe'>treecommitdiff
diff options
context:
space:
mode:
authorJerome Brunet <jbrunet@baylibre.com>2017-01-20 08:20:24 -0800
committerArnd Bergmann <arnd@arndb.de>2017-01-27 16:46:42 +0100
commitfeb3cbea0946c67060e2d5bcb7499b0a6f6700fe (patch)
tree4789978854a7fd97de08f4b77f220bcd9278417b /include/dt-bindings
parent7a308bb3016f57e5be11a677d15b821536419d36 (diff)
ARM64: dts: meson-gxbb-odroidc2: fix GbE tx link breakage
OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on the Tx path). The problem seems to come from the phy Rx path, entering the LPI state. Disabling EEE advertisement on the phy prevent this feature to be negociated with the link partner and solve the issue. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')