[
{,
"EventCode": "0x4c054",
"EventName": "PM_DERAT_MISS_16G",
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16G",
"PublicDescription": ""
},
{,
"EventCode": "0x3c054",
"EventName": "PM_DERAT_MISS_16M",
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16M",
"PublicDescription": ""
},
{,
"EventCode": "0x1c056",
"EventName": "PM_DERAT_MISS_4K",
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 4K",
"PublicDescription": ""
},
{,
"EventCode": "0x2c054",
"EventName": "PM_DERAT_MISS_64K",
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K",
"PublicDescription": ""
},
{,
"EventCode": "0x4e048",
"EventName": "PM_DPTEG_FROM_DL2L3_MOD",
"BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x3e048",
"EventName": "PM_DPTEG_FROM_DL2L3_SHR",
"BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e042",
"EventName": "PM_DPTEG_FROM_L2",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e04e",
"EventName": "PM_DPTEG_FROM_L2MISS",
"BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x2e040",
"EventName": "PM_DPTEG_FROM_L2_MEPF",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e040",
"EventName": "PM_DPTEG_FROM_L2_NO_CONFLICT",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x4e042",
"EventName": "PM_DPTEG_FROM_L3",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x3e042",
"EventName": "PM_DPTEG_FROM_L3_DISP_CONFLICT",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x2e042",
"EventName": "PM_DPTEG_FROM_L3_MEPF",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e044",
"EventName": "PM_DPTEG_FROM_L3_NO_CONFLICT",
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e04c",
"EventName": "PM_DPTEG_FROM_LL4",
"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x2e048",
"EventName": "PM_DPTEG_FROM_LMEM",
"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x2e04c",
"EventName": "PM_DPTEG_FROM_MEMORY",
"BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x4e04a",
"EventName": "PM_DPTEG_FROM_OFF_CHIP_CACHE",
"BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e048",
"EventName": "PM_DPTEG_FROM_ON_CHIP_CACHE",
"BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x2e046",
"EventName": "PM_DPTEG_FROM_RL2L3_MOD",
"BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x1e04a",
"EventName": "PM_DPTEG_FROM_RL2L3_SHR",
"BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x2e04a",
"EventName": "PM_DPTEG_FROM_RL4",
"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request",
"PublicDescription": ""
},
{,
"EventCode": "0x300fc",
"EventName": "PM_DTLB_MISS",
"BriefDescription": "Data PTEG reload",
"PublicDescription": "Data PTEG Reloaded (DTLB Miss)"
},
{,
"EventCode": "0x1c058",
"EventName": "PM_DTLB_MISS_16G",
"BriefDescription": "Data TLB Miss page size 16G",
"PublicDescription": ""
},
{,
"EventCode": "0x4c056",
"EventName": "PM_DTLB_MISS_16M",
"BriefDescription": "Data TLB Miss page size 16M",
"PublicDescription": ""
},
{,
"EventCode": "0x2c056",
"EventName": "PM_DTLB_MISS_4K",
"BriefDescription": "Data TLB Miss page size 4k",
"PublicDescription": ""
},
{,
"EventCode": "0x3c056",
"EventName": "PM_DTLB_MISS_64K",
"BriefDescription": "Data TLB Miss page size 64K",
"PublicDescription": ""
},
{,
"EventCode": "0x200f6",
"EventName": "PM_LSU_DERAT_MISS",
"BriefDescription": "DERAT Reloaded due to a DERAT miss",
"PublicDescription": "DERAT Reloaded (Miss)"
},
{,
"EventCode": "0x20066",
"EventName": "PM_TLB_MISS",
"BriefDescription": "TLB Miss (I + D)",
"PublicDescription": ""
},
]
'>I've seen this trigger twice now, where the i915_gem_object_to_ggtt()
call in intel_unpin_fb_obj() returns NULL, resulting in an oops
immediately afterwards as the (inlined) call to i915_vma_unpin_fence()
tries to dereference it.
It seems to be some race condition where the object is going away at
shutdown time, since both times happened when shutting down the X
server. The call chains were different:
- VT ioctl(KDSETMODE, KD_TEXT):
intel_cleanup_plane_fb+0x5b/0xa0 [i915]
drm_atomic_helper_cleanup_planes+0x6f/0x90 [drm_kms_helper]
intel_atomic_commit_tail+0x749/0xfe0 [i915]
intel_atomic_commit+0x3cb/0x4f0 [i915]
drm_atomic_commit+0x4b/0x50 [drm]
restore_fbdev_mode+0x14c/0x2a0 [drm_kms_helper]
drm_fb_helper_restore_fbdev_mode_unlocked+0x34/0x80 [drm_kms_helper]
drm_fb_helper_set_par+0x2d/0x60 [drm_kms_helper]
intel_fbdev_set_par+0x18/0x70 [i915]
fb_set_var+0x236/0x460
fbcon_blank+0x30f/0x350
do_unblank_screen+0xd2/0x1a0
vt_ioctl+0x507/0x12a0
tty_ioctl+0x355/0xc30
do_vfs_ioctl+0xa3/0x5e0
SyS_ioctl+0x79/0x90
entry_SYSCALL_64_fastpath+0x13/0x94
- i915 unpin_work workqueue:
intel_unpin_work_fn+0x58/0x140 [i915]
process_one_work+0x1f1/0x480
worker_thread+0x48/0x4d0
kthread+0x101/0x140
and this patch purely papers over the issue by adding a NULL pointer
check and a WARN_ON_ONCE() to avoid the oops that would then generally
make the machine unresponsive.
Other callers of i915_gem_object_to_ggtt() seem to also check for the
returned pointer being NULL and warn about it, so this clearly has
happened before in other places.
[ Reported it originally to the i915 developers on Jan 8, applying the
ugly workaround on my own now after triggering the problem for the
second time with no feedback.
This is likely to be the same bug reported as
https://bugs.freedesktop.org/show_bug.cgi?id=98829
https://bugs.freedesktop.org/show_bug.cgi?id=99134
which has a patch for the underlying problem, but it hasn't gotten to
me, so I'm applying the workaround. ]
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>