[ { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "DTLB_LOAD_MISSES.ANY", "SampleAfterValue": "200000", "BriefDescription": "DTLB load misses" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "DTLB_LOAD_MISSES.PDE_MISS", "SampleAfterValue": "200000", "BriefDescription": "DTLB load miss caused by low part of address" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "DTLB_LOAD_MISSES.STLB_HIT", "SampleAfterValue": "2000000", "BriefDescription": "DTLB second level hit" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "DTLB load miss page walks complete" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "DTLB_MISSES.ANY", "SampleAfterValue": "200000", "BriefDescription": "DTLB misses" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "DTLB_MISSES.STLB_HIT", "SampleAfterValue": "200000", "BriefDescription": "DTLB first level misses but second level hit" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "DTLB_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "DTLB miss page walks" }, { "EventCode": "0xAE", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "ITLB_FLUSH", "SampleAfterValue": "2000000", "BriefDescription": "ITLB flushes" }, { "PEBS": "1", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "ITLB_MISS_RETIRED", "SampleAfterValue": "200000", "BriefDescription": "Retired instructions that missed the ITLB (Precise Event)" }, { "EventCode": "0x85", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "ITLB_MISSES.ANY", "SampleAfterValue": "200000", "BriefDescription": "ITLB miss" }, { "EventCode": "0x85", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "ITLB_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "ITLB miss page walks" }, { "PEBS": "1", "EventCode": "0xCB", "Counter": "0,1,2,3", "UMask": "0x80", "EventName": "MEM_LOAD_RETIRED.DTLB_MISS", "SampleAfterValue": "200000", "BriefDescription": "Retired loads that miss the DTLB (Precise Event)" }, { "PEBS": "1", "EventCode": "0xC", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_STORE_RETIRED.DTLB_MISS", "SampleAfterValue": "200000", "BriefDescription": "Retired stores that miss the DTLB (Precise Event)" } ]/linux/net-next.git/log/sound/soc/fsl?h=nds-private-remove&id=06425c308b92eaf60767bc71d359f4cbc7a561f8'>fsl/Kconfig
lue='40'>40
AgeCommit message (Expand)AuthorFilesLines
space:
mode:
authorHelge Deller <deller@gmx.de>2017-01-28 11:52:02 +0100
committerHelge Deller <deller@gmx.de>2017-01-28 21:54:23 +0100
commit2ad5d52d42810bed95100a3d912679d8864421ec (patch)
tree7f93e2f906b1c86f5b76c0f4c0978d41a8a29861 /tools/usb/ffs-test.c
parent83b5d1e3d3013dbf90645a5d07179d018c8243fa (diff)
parisc: Don't use BITS_PER_LONG in userspace-exported swab.h header
In swab.h the "#if BITS_PER_LONG > 32" breaks compiling userspace programs if BITS_PER_LONG is #defined by userspace with the sizeof() compiler builtin. Solve this problem by using __BITS_PER_LONG instead. Since we now #include asm/bitsperlong.h avoid further potential userspace pollution by moving the #define of SHIFT_PER_LONG to bitops.h which is not exported to userspace. This patch unbreaks compiling qemu on hppa/parisc. Signed-off-by: Helge Deller <deller@gmx.de> Cc: <stable@vger.kernel.org>
Diffstat (limited to 'tools/usb/ffs-test.c')