[
    {
        "EventCode": "0x8",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "DTLB_LOAD_MISSES.ANY",
        "SampleAfterValue": "200000",
        "BriefDescription": "DTLB load misses"
    },
    {
        "EventCode": "0x8",
        "Counter": "0,1,2,3",
        "UMask": "0x20",
        "EventName": "DTLB_LOAD_MISSES.PDE_MISS",
        "SampleAfterValue": "200000",
        "BriefDescription": "DTLB load miss caused by low part of address"
    },
    {
        "EventCode": "0x8",
        "Counter": "0,1,2,3",
        "UMask": "0x10",
        "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
        "SampleAfterValue": "2000000",
        "BriefDescription": "DTLB second level hit"
    },
    {
        "EventCode": "0x8",
        "Counter": "0,1,2,3",
        "UMask": "0x2",
        "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
        "SampleAfterValue": "200000",
        "BriefDescription": "DTLB load miss page walks complete"
    },
    {
        "EventCode": "0x49",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "DTLB_MISSES.ANY",
        "SampleAfterValue": "200000",
        "BriefDescription": "DTLB misses"
    },
    {
        "EventCode": "0x49",
        "Counter": "0,1,2,3",
        "UMask": "0x10",
        "EventName": "DTLB_MISSES.STLB_HIT",
        "SampleAfterValue": "200000",
        "BriefDescription": "DTLB first level misses but second level hit"
    },
    {
        "EventCode": "0x49",
        "Counter": "0,1,2,3",
        "UMask": "0x2",
        "EventName": "DTLB_MISSES.WALK_COMPLETED",
        "SampleAfterValue": "200000",
        "BriefDescription": "DTLB miss page walks"
    },
    {
        "EventCode": "0xAE",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "ITLB_FLUSH",
        "SampleAfterValue": "2000000",
        "BriefDescription": "ITLB flushes"
    },
    {
        "PEBS": "1",
        "EventCode": "0xC8",
        "Counter": "0,1,2,3",
        "UMask": "0x20",
        "EventName": "ITLB_MISS_RETIRED",
        "SampleAfterValue": "200000",
        "BriefDescription": "Retired instructions that missed the ITLB (Precise Event)"
    },
    {
        "EventCode": "0x85",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "ITLB_MISSES.ANY",
        "SampleAfterValue": "200000",
        "BriefDescription": "ITLB miss"
    },
    {
        "EventCode": "0x85",
        "Counter": "0,1,2,3",
        "UMask": "0x2",
        "EventName": "ITLB_MISSES.WALK_COMPLETED",
        "SampleAfterValue": "200000",
        "BriefDescription": "ITLB miss page walks"
    },
    {
        "PEBS": "1",
        "EventCode": "0xCB",
        "Counter": "0,1,2,3",
        "UMask": "0x80",
        "EventName": "MEM_LOAD_RETIRED.DTLB_MISS",
        "SampleAfterValue": "200000",
        "BriefDescription": "Retired loads that miss the DTLB (Precise Event)"
    },
    {
        "PEBS": "1",
        "EventCode": "0xC",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "MEM_STORE_RETIRED.DTLB_MISS",
        "SampleAfterValue": "200000",
        "BriefDescription": "Retired stores that miss the DTLB (Precise Event)"
    }
]span='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><table summary='commit info' class='commit-info'>
<tr><th>author</th><td>Jiri Slaby &lt;jslaby@suse.cz&gt;</td><td class='right'>2017-01-18 14:29:21 +0100</td></tr>
<tr><th>committer</th><td>Ingo Molnar &lt;mingo@kernel.org&gt;</td><td class='right'>2017-01-19 08:39:44 +0100</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/net/ipv4/tcp_bbr.c?id=b5b46c4740aed1538544f0fa849c5b76c7823469'>b5b46c4740aed1538544f0fa849c5b76c7823469</a> (<a href='/cgit.cgi/linux/net-next.git/patch/net/ipv4/tcp_bbr.c?id=b5b46c4740aed1538544f0fa849c5b76c7823469'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?id=b5b46c4740aed1538544f0fa849c5b76c7823469'>125e7aced4835bad6f6a0c0d02d012f333caf922</a> /<a href='/cgit.cgi/linux/net-next.git/tree/net/ipv4/tcp_bbr.c?id=b5b46c4740aed1538544f0fa849c5b76c7823469'>net/ipv4/tcp_bbr.c</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/net/ipv4/tcp_bbr.c?id=fa19a769f82fb9a5ca000b83cacd13fcaeda51ac'>fa19a769f82fb9a5ca000b83cacd13fcaeda51ac</a> (<a href='/cgit.cgi/linux/net-next.git/diff/net/ipv4/tcp_bbr.c?id=b5b46c4740aed1538544f0fa849c5b76c7823469&amp;id2=fa19a769f82fb9a5ca000b83cacd13fcaeda51ac'>diff</a>)</td></tr></table>
<div class='commit-subject'>objtool: Fix IRET's opcode</div><div class='commit-msg'>The IRET opcode is 0xcf according to the Intel manual and also to objdump of my
vmlinux:

    1ea8:       48 cf                   iretq

Fix the opcode in arch_decode_instruction().

The previous value (0xc5) seems to correspond to LDS.

Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
Acked-by: Josh Poimboeuf &lt;jpoimboe@redhat.com&gt;
Cc: Andy Lutomirski &lt;luto@kernel.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/20170118132921.19319-1-jslaby@suse.cz
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</div><div class='diffstat-header'><a href='/cgit.cgi/linux/net-next.git/diff/?id=b5b46c4740aed1538544f0fa849c5b76c7823469'>Diffstat</a> (limited to 'net/ipv4/tcp_bbr.c')</div><table summary='diffstat' class='diffstat'>