[
    {
        "EventCode": "0xC1",
        "Counter": "0,1,2,3",
        "UMask": "0x8",
        "EventName": "OTHER_ASSISTS.AVX_STORE",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of GSSE memory assist for stores. GSSE microcode assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xC1",
        "Counter": "0,1,2,3",
        "UMask": "0x10",
        "EventName": "OTHER_ASSISTS.AVX_TO_SSE",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xC1",
        "Counter": "0,1,2,3",
        "UMask": "0x20",
        "EventName": "OTHER_ASSISTS.SSE_TO_AVX",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xCA",
        "Counter": "0,1,2,3",
        "UMask": "0x2",
        "EventName": "FP_ASSIST.X87_OUTPUT",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of X87 assists due to output value.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xCA",
        "Counter": "0,1,2,3",
        "UMask": "0x4",
        "EventName": "FP_ASSIST.X87_INPUT",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of X87 assists due to input value.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xCA",
        "Counter": "0,1,2,3",
        "UMask": "0x8",
        "EventName": "FP_ASSIST.SIMD_OUTPUT",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of SIMD FP assists due to Output values.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xCA",
        "Counter": "0,1,2,3",
        "UMask": "0x10",
        "EventName": "FP_ASSIST.SIMD_INPUT",
        "SampleAfterValue": "100003",
        "BriefDescription": "Number of SIMD FP assists due to input values.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x10",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "FP_COMP_OPS_EXE.X87",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB, FCOM, FMULs, integer MULsand IMULs, FDIVs, FPREMs, FSQRTS, integer DIVs, and IDIVs. This event does not distinguish an FADD used in the middle of a transcendental flow from a s.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x10",
        "Counter": "0,1,2,3",
        "UMask": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x10",
        "Counter": "0,1,2,3",
        "UMask": "0x20",
        "EventName": "FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x10",
        "Counter": "0,1,2,3",
        "UMask": "0x40",
        "EventName": "FP_COMP_OPS_EXE.SSE_PACKED_SINGLE",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x10",
        "Counter": "0,1,2,3",
        "UMask": "0x80",
        "EventName": "FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issued this cycle.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x11",
        "Counter": "0,1,2,3",
        "UMask": "0x1",
        "EventName": "SIMD_FP_256.PACKED_SINGLE",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of GSSE-256 Computational FP single precision uops issued this cycle.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0x11",
        "Counter": "0,1,2,3",
        "UMask": "0x2",
        "EventName": "SIMD_FP_256.PACKED_DOUBLE",
        "SampleAfterValue": "2000003",
        "BriefDescription": "Number of AVX-256 Computational FP double precision uops issued this cycle.",
        "CounterHTOff": "0,1,2,3,4,5,6,7"
    },
    {
        "EventCode": "0xCA",
        "Counter": "0,1,2,3",
        "UMask": "0x1e",
        "EventName": "FP_ASSIST.ANY",
        "SampleAfterValue": "100003",
        "BriefDescription": "Cycles with any input/output SSE or FP assist.",
        "CounterMask": "1",
        "CounterHTOff": "0,1,2,3"
    }
]h/drivers/usb/storage/isd200.c?id=242ef5d483594a2bed6b8a2685849c83e7810d17'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?id=242ef5d483594a2bed6b8a2685849c83e7810d17'>7ed12099198823ccb1d41180be6b85cee5ecce3f</a> /<a href='/cgit.cgi/linux/net-next.git/tree/drivers/usb/storage/isd200.c?id=242ef5d483594a2bed6b8a2685849c83e7810d17'>drivers/usb/storage/isd200.c</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/drivers/usb/storage/isd200.c?id=54a07c7bb0da0343734c78212bbe9f3735394962'>54a07c7bb0da0343734c78212bbe9f3735394962</a> (<a href='/cgit.cgi/linux/net-next.git/diff/drivers/usb/storage/isd200.c?id=242ef5d483594a2bed6b8a2685849c83e7810d17&amp;id2=54a07c7bb0da0343734c78212bbe9f3735394962'>diff</a>)</td></tr></table>
<div class='commit-subject'>drm/vmwgfx: Fix depth input into drm_mode_legacy_fb_format</div><div class='commit-msg'>Currently the pitch is passed in as depth.  This causes
drm_mode_legacy_fb_format() to return the wrong pixel format.

The wrong pixel format will be rejected by vmw_kms_new_framebuffer(),
thus leaving par-&gt;set_fb to NULL.

This eventually causes a crash in vmw_fb_setcolreg() when the code
tries to dereference par-&gt;set_fb.

Signed-off-by: Sinclair Yeh &lt;syeh@vmware.com&gt;
Reviewed-by: Thomas Hellstrom &lt;thellstrom@vmware.com&gt;
</div><div class='diffstat-header'><a href='/cgit.cgi/linux/net-next.git/diff/?id=242ef5d483594a2bed6b8a2685849c83e7810d17'>Diffstat</a> (limited to 'drivers/usb/storage/isd200.c')</div><table summary='diffstat' class='diffstat'>