[
    {
        "PEBS": "1",
        "PublicDescription": "This event counts the number of load ops retired that had DTLB miss.",
        "EventCode": "0x04",
        "Counter": "0,1",
        "UMask": "0x8",
        "EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS",
        "SampleAfterValue": "200003",
        "BriefDescription": "Loads missed DTLB"
    },
    {
        "PublicDescription": "This event counts when a data (D) page walk is completed or started.  Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks.",
        "EventCode": "0x05",
        "Counter": "0,1",
        "UMask": "0x1",
        "EventName": "PAGE_WALKS.D_SIDE_WALKS",
        "SampleAfterValue": "100003",
        "BriefDescription": "D-side page-walks",
        "EdgeDetect": "1"
    },
    {
        "PublicDescription": "This event counts every cycle when a D-side (walks due to a load) page walk is in progress. Page walk duration divided by number of page walks is the average duration of page-walks.",
        "EventCode": "0x05",
        "Counter": "0,1",
        "UMask": "0x1",
        "EventName": "PAGE_WALKS.D_SIDE_CYCLES",
        "SampleAfterValue": "200003",
        "BriefDescription": "Duration of D-side page-walks in core cycles"
    },
    {
        "PublicDescription": "This event counts when an instruction (I) page walk is completed or started.  Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks.",
        "EventCode": "0x05",
        "Counter": "0,1",
        "UMask": "0x2",
        "EventName": "PAGE_WALKS.I_SIDE_WALKS",
        "SampleAfterValue": "100003",
        "BriefDescription": "I-side page-walks",
        "EdgeDetect": "1"
    },
    {
        "PublicDescription": "This event counts every cycle when a I-side (walks due to an instruction fetch) page walk is in progress. Page walk duration divided by number of page walks is the average duration of page-walks.",
        "EventCode": "0x05",
        "Counter": "0,1",
        "UMask": "0x2",
        "EventName": "PAGE_WALKS.I_SIDE_CYCLES",
        "SampleAfterValue": "200003",
        "BriefDescription": "Duration of I-side page-walks in core cycles"
    },
    {
        "PublicDescription": "This event counts when a data (D) page walk or an instruction (I) page walk is completed or started.  Since a page walk implies a TLB miss, the number of TLB misses can be counted by counting the number of pagewalks.",
        "EventCode": "0x05",
        "Counter": "0,1",
        "UMask": "0x3",
        "EventName": "PAGE_WALKS.WALKS",
        "SampleAfterValue": "100003",
        "BriefDescription": "Total page walks that are completed (I-side and D-side)",
        "EdgeDetect": "1"
    },
    {
        "PublicDescription": "This event counts every cycle when a data (D) page walk or instruction (I) page walk is in progress.  Since a pagewalk implies a TLB miss, the approximate cost of a TLB miss can be determined from this event.",
        "EventCode": "0x05",
        "Counter": "0,1",
        "UMask": "0x3",
        "EventName": "PAGE_WALKS.CYCLES",
        "SampleAfterValue": "200003",
        "BriefDescription": "Total cycles for all the page walks. (I-side and D-side)"
    }
]s/opl4?h=nds-private-remove&amp;id=ebc05ba7e8600b52a2a0c87a43105143368aca2a'>opl4</a>/<a href='/cgit.cgi/linux/net-next.git/log/sound/drivers/opl4/Makefile?h=nds-private-remove&amp;id=ebc05ba7e8600b52a2a0c87a43105143368aca2a'>Makefile</a></div><div class='content'><table class='list nowrap'><tr class='nohover'><th class='left'>Age</th><th class='left'>Commit message (<a href='/cgit.cgi/linux/net-next.git/log/sound/drivers/opl4/Makefile?h=nds-private-remove&amp;id=ebc05ba7e8600b52a2a0c87a43105143368aca2a&amp;showmsg=1'>Expand</a>)</th><th class='left'>Author</th><th class='left'>Files</th><th class='left'>Lines</th></tr>
ion><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><table summary='commit info' class='commit-info'>
<tr><th>author</th><td>Rask Ingemann Lambertsen &lt;rask@formelder.dk&gt;</td><td class='right'>2017-01-21 17:11:43 +0100</td></tr>
<tr><th>committer</th><td>Mark Brown &lt;broonie@kernel.org&gt;</td><td class='right'>2017-01-23 18:10:05 +0000</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/security/selinux/include/audit.h?id=d0e287a401d9acf67b75180b26e2d62b7d482652'>d0e287a401d9acf67b75180b26e2d62b7d482652</a> (<a href='/cgit.cgi/linux/net-next.git/patch/security/selinux/include/audit.h?id=d0e287a401d9acf67b75180b26e2d62b7d482652'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?id=d0e287a401d9acf67b75180b26e2d62b7d482652'>f1ba3cd0583e38846c4f6e32eee74a25a2739a31</a> /<a href='/cgit.cgi/linux/net-next.git/tree/security/selinux/include/audit.h?id=d0e287a401d9acf67b75180b26e2d62b7d482652'>security/selinux/include/audit.h</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/security/selinux/include/audit.h?id=d00b74613fb18dfd0a5aa99270ee2e72d5c808d7'>d00b74613fb18dfd0a5aa99270ee2e72d5c808d7</a> (<a href='/cgit.cgi/linux/net-next.git/diff/security/selinux/include/audit.h?id=d0e287a401d9acf67b75180b26e2d62b7d482652&amp;id2=d00b74613fb18dfd0a5aa99270ee2e72d5c808d7'>diff</a>)</td></tr></table>
<div class='commit-subject'>regulator: axp20x: AXP806: Fix dcdcb being set instead of dcdce</div><div class='commit-msg'>A typo or copy-paste bug means that the register access intended for
regulator dcdce goes to dcdcb instead. This patch corrects it.

Fixes: 2ca342d391e3 (regulator: axp20x: Support AXP806 variant)
Signed-off-by: Rask Ingemann Lambertsen &lt;rask@formelder.dk&gt;
Acked-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Cc: stable@vger.kernel.org
</div><div class='diffstat-header'><a href='/cgit.cgi/linux/net-next.git/diff/?id=d0e287a401d9acf67b75180b26e2d62b7d482652'>Diffstat</a> (limited to 'security/selinux/include/audit.h')</div><table summary='diffstat' class='diffstat'>