[ { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "DTLB_LOAD_MISSES.ANY", "SampleAfterValue": "200000", "BriefDescription": "DTLB load misses" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "DTLB_LOAD_MISSES.PDE_MISS", "SampleAfterValue": "200000", "BriefDescription": "DTLB load miss caused by low part of address" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "DTLB_LOAD_MISSES.STLB_HIT", "SampleAfterValue": "2000000", "BriefDescription": "DTLB second level hit" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "DTLB load miss page walks complete" }, { "EventCode": "0x8", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "DTLB_LOAD_MISSES.WALK_CYCLES", "SampleAfterValue": "200000", "BriefDescription": "DTLB load miss page walk cycles" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "DTLB_MISSES.ANY", "SampleAfterValue": "200000", "BriefDescription": "DTLB misses" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x80", "EventName": "DTLB_MISSES.LARGE_WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "DTLB miss large page walks" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "DTLB_MISSES.STLB_HIT", "SampleAfterValue": "200000", "BriefDescription": "DTLB first level misses but second level hit" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "DTLB_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "DTLB miss page walks" }, { "EventCode": "0x49", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "DTLB_MISSES.WALK_CYCLES", "SampleAfterValue": "2000000", "BriefDescription": "DTLB miss page walk cycles" }, { "EventCode": "0x4F", "Counter": "0,1,2,3", "UMask": "0x10", "EventName": "EPT.WALK_CYCLES", "SampleAfterValue": "2000000", "BriefDescription": "Extended Page Table walk cycles" }, { "EventCode": "0xAE", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "ITLB_FLUSH", "SampleAfterValue": "2000000", "BriefDescription": "ITLB flushes" }, { "PEBS": "1", "EventCode": "0xC8", "Counter": "0,1,2,3", "UMask": "0x20", "EventName": "ITLB_MISS_RETIRED", "SampleAfterValue": "200000", "BriefDescription": "Retired instructions that missed the ITLB (Precise Event)" }, { "EventCode": "0x85", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "ITLB_MISSES.ANY", "SampleAfterValue": "200000", "BriefDescription": "ITLB miss" }, { "EventCode": "0x85", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "ITLB_MISSES.WALK_COMPLETED", "SampleAfterValue": "200000", "BriefDescription": "ITLB miss page walks" }, { "EventCode": "0x85", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "ITLB_MISSES.WALK_CYCLES", "SampleAfterValue": "2000000", "BriefDescription": "ITLB miss page walk cycles" }, { "PEBS": "1", "EventCode": "0xCB", "Counter": "0,1,2,3", "UMask": "0x80", "EventName": "MEM_LOAD_RETIRED.DTLB_MISS", "SampleAfterValue": "200000", "BriefDescription": "Retired loads that miss the DTLB (Precise Event)" }, { "PEBS": "1", "EventCode": "0xC", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MEM_STORE_RETIRED.DTLB_MISS", "SampleAfterValue": "200000", "BriefDescription": "Retired stores that miss the DTLB (Precise Event)" } ]hange='this.form.submit();'>
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-02 12:34:27 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-02 12:34:27 -0800 |
commit | f2557779e1a9cfbf69c99b74da26cc1b2b10e752 (patch) | |
tree | 8ddca65c897199add553948c429072b8bd463692 /drivers/usb/phy/phy-twl6030-usb.c | |
parent | 6d04dfc8966019b8b0977b2cb942351f13d2b178 (diff) | |
parent | 030305d69fc6963c16003f50d7e8d74b02d0a143 (diff) |