[ { "EventCode": "0xE8", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "BPU_CLEARS.EARLY", "SampleAfterValue": "2000000", "BriefDescription": "Early Branch Prediciton Unit clears" }, { "EventCode": "0xE8", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "BPU_CLEARS.LATE", "SampleAfterValue": "2000000", "BriefDescription": "Late Branch Prediction Unit clears" }, { "EventCode": "0xE5", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "BPU_MISSED_CALL_RET", "SampleAfterValue": "2000000", "BriefDescription": "Branch prediction unit missed call or return" }, { "EventCode": "0xD5", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "ES_REG_RENAMES", "SampleAfterValue": "2000000", "BriefDescription": "ES segment renames" }, { "EventCode": "0x6C", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "IO_TRANSACTIONS", "SampleAfterValue": "2000000", "BriefDescription": "I/O transactions" }, { "EventCode": "0x80", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "L1I.CYCLES_STALLED", "SampleAfterValue": "2000000", "BriefDescription": "L1I instruction fetch stall cycles" }, { "EventCode": "0x80", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "L1I.HITS", "SampleAfterValue": "2000000", "BriefDescription": "L1I instruction fetch hits" }, { "EventCode": "0x80", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "L1I.MISSES", "SampleAfterValue": "2000000", "BriefDescription": "L1I instruction fetch misses" }, { "EventCode": "0x80", "Counter": "0,1,2,3", "UMask": "0x3", "EventName": "L1I.READS", "SampleAfterValue": "2000000", "BriefDescription": "L1I Instruction fetches" }, { "EventCode": "0x82", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "LARGE_ITLB.HIT", "SampleAfterValue": "200000", "BriefDescription": "Large ITLB hit" }, { "EventCode": "0x3", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "LOAD_BLOCK.OVERLAP_STORE", "SampleAfterValue": "200000", "BriefDescription": "Loads that partially overlap an earlier store" }, { "EventCode": "0x13", "Counter": "0,1,2,3", "UMask": "0x7", "EventName": "LOAD_DISPATCH.ANY", "SampleAfterValue": "2000000", "BriefDescription": "All loads dispatched" }, { "EventCode": "0x13", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "LOAD_DISPATCH.MOB", "SampleAfterValue": "2000000", "BriefDescription": "Loads dispatched from the MOB" }, { "EventCode": "0x13", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "LOAD_DISPATCH.RS", "SampleAfterValue": "2000000", "BriefDescription": "Loads dispatched that bypass the MOB" }, { "EventCode": "0x13", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "LOAD_DISPATCH.RS_DELAYED", "SampleAfterValue": "2000000", "BriefDescription": "Loads dispatched from stage 305" }, { "EventCode": "0x7", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "PARTIAL_ADDRESS_ALIAS", "SampleAfterValue": "200000", "BriefDescription": "False dependencies due to partial address aliasing" }, { "EventCode": "0xD2", "Counter": "0,1,2,3", "UMask": "0xf", "EventName": "RAT_STALLS.ANY", "SampleAfterValue": "2000000", "BriefDescription": "All RAT stall cycles" }, { "EventCode": "0xD2", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "RAT_STALLS.FLAGS", "SampleAfterValue": "2000000", "BriefDescription": "Flag stall cycles" }, { "EventCode": "0xD2", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "RAT_STALLS.REGISTERS", "SampleAfterValue": "2000000", "BriefDescription": "Partial register stall cycles" }, { "EventCode": "0xD2", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "RAT_STALLS.ROB_READ_PORT", "SampleAfterValue": "2000000", "BriefDescription": "ROB read port stalls cycles" }, { "EventCode": "0xD2", "Counter": "0,1,2,3", "UMask": "0x8", "EventName": "RAT_STALLS.SCOREBOARD", "SampleAfterValue": "2000000", "BriefDescription": "Scoreboard stall cycles" }, { "EventCode": "0x4", "Counter": "0,1,2,3", "UMask": "0x7", "EventName": "SB_DRAIN.ANY", "SampleAfterValue": "200000", "BriefDescription": "All Store buffer stall cycles" }, { "EventCode": "0xD4", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "SEG_RENAME_STALLS", "SampleAfterValue": "2000000", "BriefDescription": "Segment rename stall cycles" }, { "EventCode": "0xB8", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "SNOOP_RESPONSE.HIT", "SampleAfterValue": "100000", "BriefDescription": "Thread responded HIT to snoop" }, { "EventCode": "0xB8", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "SNOOP_RESPONSE.HITE", "SampleAfterValue": "100000", "BriefDescription": "Thread responded HITE to snoop" }, { "EventCode": "0xB8", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "SNOOP_RESPONSE.HITM", "SampleAfterValue": "100000", "BriefDescription": "Thread responded HITM to snoop" }, { "EventCode": "0xB4", "Counter": "0,1,2,3", "UMask": "0x4", "EventName": "SNOOPQ_REQUESTS.CODE", "SampleAfterValue": "100000", "BriefDescription": "Snoop code requests" }, { "EventCode": "0xB4", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "SNOOPQ_REQUESTS.DATA", "SampleAfterValue": "100000", "BriefDescription": "Snoop data requests" }, { "EventCode": "0xB4", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "SNOOPQ_REQUESTS.INVALIDATE", "SampleAfterValue": "100000", "BriefDescription": "Snoop invalidate requests" }, { "EventCode": "0xB3", "UMask": "0x4", "EventName": "SNOOPQ_REQUESTS_OUTSTANDING.CODE", "SampleAfterValue": "2000000", "BriefDescription": "Outstanding snoop code requests" }, { "EventCode": "0xB3", "UMask": "0x4", "EventName": "SNOOPQ_REQUESTS_OUTSTANDING.CODE_NOT_EMPTY", "SampleAfterValue": "2000000", "BriefDescription": "Cycles snoop code requests queued", "CounterMask": "1" }, { "EventCode": "0xB3", "UMask": "0x1", "EventName": "SNOOPQ_REQUESTS_OUTSTANDING.DATA", "SampleAfterValue": "2000000", "BriefDescription": "Outstanding snoop data requests" }, { "EventCode": "0xB3", "UMask": "0x1", "EventName": "SNOOPQ_REQUESTS_OUTSTANDING.DATA_NOT_EMPTY", "SampleAfterValue": "2000000", "BriefDescription": "Cycles snoop data requests queued", "CounterMask": "1" }, { "EventCode": "0xB3", "UMask": "0x2", "EventName": "SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE", "SampleAfterValue": "2000000", "BriefDescription": "Outstanding snoop invalidate requests" }, { "EventCode": "0xB3", "UMask": "0x2", "EventName": "SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE_NOT_EMPTY", "SampleAfterValue": "2000000", "BriefDescription": "Cycles snoop invalidate requests queued", "CounterMask": "1" }, { "EventCode": "0xF6", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "SQ_FULL_STALL_CYCLES", "SampleAfterValue": "2000000", "BriefDescription": "Super Queue full stall cycles" } ]t/commit/net?id=7d4d5065ecb0cea9c5815d5e0df5fb586c5ee9b5'>net: ipv6: Use compressed IPv6 addresses showing route replace errorDavid Ahern1-1/+1 2017-02-04net: ipv6: Change notifications for multipath delete to RTA_MULTIPATHDavid Ahern2-1/+28 2017-02-04net: ipv6: Change notifications for multipath add to RTA_MULTIPATHDavid Ahern2-3/+53 2017-02-04net: ipv6: Add support to dump multipath routes via RTA_MULTIPATH attributeDavid Ahern2-17/+105 2017-02-04net: ipv6: Allow shorthand delete of all nexthops in multipath routeDavid Ahern1-2/+36 2017-02-03net: skb_needs_check() accepts CHECKSUM_NONE for txEric Dumazet1-3/+4 2017-02-03net: remove support for per driver ndo_busy_poll()Eric Dumazet2-16/+0 2017-02-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf-nextDavid S. Miller53-640/+576 2017-02-03sched: cls_flower: expose priority to offloading netdeviceJiri Pirko1-0/+3 2017-02-03tcp: clear pfmemalloc on outgoing skbEric Dumazet1-0/+7 2017-02-03net: ipv6: Set protocol to kernel for local routesDavid Ahern1-0/+1 2017-02-03bridge: vlan dst_metadata hooks in ingress and egress pathsRoopa Prabhu6-2/+82 2017-02-03bridge: per vlan dst_metadata netlink supportRoopa Prabhu7-48/+641 2017-02-03net/sched: act_ife: Change to use ife moduleYotam Gigi2-78/+33 2017-02-03net: Introduce ife encapsulation moduleYotam Gigi5-0/+165 2017-02-03net/sched: act_ife: Unexport ife_tlv_meta_encodeYotam Gigi1-2/+2 2017-02-03tcp: add tcp_mss_clamp() helperEric Dumazet