#ifndef PMU_EVENTS_H #define PMU_EVENTS_H /* * Describe each PMU event. Each CPU has a table of PMU events. */ struct pmu_event { const char *name; const char *event; const char *desc; const char *topic; const char *long_desc; }; /* * * Map a CPU to its table of PMU events. The CPU is identified by the * cpuid field, which is an arch-specific identifier for the CPU. * The identifier specified in tools/perf/pmu-events/arch/xxx/mapfile * must match the get_cpustr() in tools/perf/arch/xxx/util/header.c) * * The cpuid can contain any character other than the comma. */ struct pmu_events_map { const char *cpuid; const char *version; const char *type; /* core, uncore etc */ struct pmu_event *table; }; /* * Global table mapping each known CPU for the architecture to its * table of PMU events. */ extern struct pmu_events_map pmu_events_map[]; #endif ='/cgit.cgi/'>index : net-next.git
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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2017-01-17 13:46:29 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-01-23 22:41:33 +0800
commit11e3b725cfc282efe9d4a354153e99d86a16af08 (patch)
tree8b5b9e0e1bcae1ab98ee652ffb7b13b05c209bd6 /tools/build/feature/test-libunwind-debug-frame-aarch64.c
parentd6040764adcb5cb6de1489422411d701c158bb69 (diff)
crypto: arm64/aes-blk - honour iv_out requirement in CBC and CTR modes
Update the ARMv8 Crypto Extensions and the plain NEON AES implementations in CBC and CTR modes to return the next IV back to the skcipher API client. This is necessary for chaining to work correctly. Note that for CTR, this is only done if the request is a round multiple of the block size, since otherwise, chaining is impossible anyway. Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'tools/build/feature/test-libunwind-debug-frame-aarch64.c')