#include #include "util.h" #include "../perf.h" #include "cloexec.h" #include "asm/bug.h" #include "debug.h" #include #include #include static unsigned long flag = PERF_FLAG_FD_CLOEXEC; int __weak sched_getcpu(void) { #ifdef __NR_getcpu unsigned cpu; int err = syscall(__NR_getcpu, &cpu, NULL, NULL); if (!err) return cpu; #else errno = ENOSYS; #endif return -1; } static int perf_flag_probe(void) { /* use 'safest' configuration as used in perf_evsel__fallback() */ struct perf_event_attr attr = { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CPU_CLOCK, .exclude_kernel = 1, }; int fd; int err; int cpu; pid_t pid = -1; char sbuf[STRERR_BUFSIZE]; cpu = sched_getcpu(); if (cpu < 0) cpu = 0; /* * Using -1 for the pid is a workaround to avoid gratuitous jump label * changes. */ while (1) { /* check cloexec flag */ fd = sys_perf_event_open(&attr, pid, cpu, -1, PERF_FLAG_FD_CLOEXEC); if (fd < 0 && pid == -1 && errno == EACCES) { pid = 0; continue; } break; } err = errno; if (fd >= 0) { close(fd); return 1; } WARN_ONCE(err != EINVAL && err != EBUSY, "perf_event_open(..., PERF_FLAG_FD_CLOEXEC) failed with unexpected error %d (%s)\n", err, str_error_r(err, sbuf, sizeof(sbuf))); /* not supported, confirm error related to PERF_FLAG_FD_CLOEXEC */ while (1) { fd = sys_perf_event_open(&attr, pid, cpu, -1, 0); if (fd < 0 && pid == -1 && errno == EACCES) { pid = 0; continue; } break; } err = errno; if (fd >= 0) close(fd); if (WARN_ONCE(fd < 0 && err != EBUSY, "perf_event_open(..., 0) failed unexpectedly with error %d (%s)\n", err, str_error_r(err, sbuf, sizeof(sbuf)))) return -1; return 0; } unsigned long perf_event_open_cloexec_flag(void) { static bool probed; if (!probed) { if (perf_flag_probe() <= 0) flag = 0; probed = true; } return flag; } itdiff
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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2017-01-29 15:07:34 +0300
committerDavid S. Miller <davem@davemloft.net>2017-01-30 22:05:43 -0500
commit1a0bee6c1e788218fd1d141db320db970aace7f0 (patch)
tree46c4116bc8ef4a7df718516a648597d9e21c15f1 /net/mac80211/ocb.c
parent63c190429020a9701b42887ac22c28f287f1762f (diff)
sh_eth: rename EESIPR bits
Since the commit b0ca2a21f769 ("sh_eth: Add support of SH7763 to sh_eth") the *enum* declaring the EESIPR bits (interrupt mask) went out of sync with the *enum* declaring the EESR bits (interrupt status) WRT bit naming and formatting. I'd like to restore the consistency by using EESIPR as the bit name prefix, renaming the *enum* to EESIPR_BIT, and (finally) renaming the bits according to the available Renesas SH77{34|63} manuals; additionally, reconstruct couple names using the EESR bit declaration above... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/mac80211/ocb.c')