/* * Copyright(C) 2015 Linaro Limited. All rights reserved. * Author: Mathieu Poirier * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program. If not, see . */ #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__ #define INCLUDE__UTIL_PERF_CS_ETM_H__ /* Versionning header in case things need tro change in the future. That way * decoding of old snapshot is still possible. */ enum { /* Starting with 0x0 */ CS_HEADER_VERSION_0, /* PMU->type (32 bit), total # of CPUs (32 bit) */ CS_PMU_TYPE_CPUS, CS_ETM_SNAPSHOT, CS_HEADER_VERSION_0_MAX, }; /* Beginning of header common to both ETMv3 and V4 */ enum { CS_ETM_MAGIC, CS_ETM_CPU, }; /* ETMv3/PTM metadata */ enum { /* Dynamic, configurable parameters */ CS_ETM_ETMCR = CS_ETM_CPU + 1, CS_ETM_ETMTRACEIDR, /* RO, taken from sysFS */ CS_ETM_ETMCCER, CS_ETM_ETMIDR, CS_ETM_PRIV_MAX, }; /* ETMv4 metadata */ enum { /* Dynamic, configurable parameters */ CS_ETMV4_TRCCONFIGR = CS_ETM_CPU + 1, CS_ETMV4_TRCTRACEIDR, /* RO, taken from sysFS */ CS_ETMV4_TRCIDR0, CS_ETMV4_TRCIDR1, CS_ETMV4_TRCIDR2, CS_ETMV4_TRCIDR8, CS_ETMV4_TRCAUTHSTATUS, CS_ETMV4_PRIV_MAX, }; #define KiB(x) ((x) * 1024) #define MiB(x) ((x) * 1024 * 1024) #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64)) static const u64 __perf_cs_etmv3_magic = 0x3030303030303030ULL; static const u64 __perf_cs_etmv4_magic = 0x4040404040404040ULL; #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64)) #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64)) #endif bindings/pinctrl/omap.h?id=81917bad86a66f2bdcb12b4c10ab1bf333ed25ec'>commitdiff
path: root/include/dt-bindings/pinctrl/omap.h
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Diffstat (limited to 'include/dt-bindings/pinctrl/omap.h')
b3daaba2857b32c4cf4c82f503d6a00a67de (patch)
tree329a05b424d783db675a4c711bd7633575e8181b /tools/include/asm/bug.h
parent49def1853334396f948dcb4cedb9347abb318df5 (diff)
x86/ioapic: Restore IO-APIC irq_chip retrigger callback
commit d32932d02e18 removed the irq_retrigger callback from the IO-APIC chip and did not add it to the new IO-APIC-IR irq chip. Unfortunately the software resend fallback is not enabled on X86, so edge interrupts which are received during the lazy disabled state of the interrupt line are not retriggered and therefor lost. Restore the callbacks. [ tglx: Massaged changelog ] Fixes: d32932d02e18 ("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") Signed-off-by: Ruslan Ruslichenko <rruslich@cisco.com> Cc: xe-linux-external@cisco.com Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1484662432-13580-1-git-send-email-rruslich@cisco.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'tools/include/asm/bug.h')