/* * jitdump.h: jitted code info encapsulation file format * * Adapted from OProfile GPLv2 support jidump.h: * Copyright 2007 OProfile authors * Jens Wilke * Daniel Hansel * Copyright IBM Corporation 2007 */ #ifndef JITDUMP_H #define JITDUMP_H #include #include #include /* JiTD */ #define JITHEADER_MAGIC 0x4A695444 #define JITHEADER_MAGIC_SW 0x4454694A #define PADDING_8ALIGNED(x) ((((x) + 7) & 7) ^ 7) #define ALIGN_8(x) (((x) + 7) & (~7)) #define JITHEADER_VERSION 1 enum jitdump_flags_bits { JITDUMP_FLAGS_ARCH_TIMESTAMP_BIT, JITDUMP_FLAGS_MAX_BIT, }; #define JITDUMP_FLAGS_ARCH_TIMESTAMP (1ULL << JITDUMP_FLAGS_ARCH_TIMESTAMP_BIT) #define JITDUMP_FLAGS_RESERVED (JITDUMP_FLAGS_MAX_BIT < 64 ? \ (~((1ULL << JITDUMP_FLAGS_MAX_BIT) - 1)) : 0) struct jitheader { uint32_t magic; /* characters "jItD" */ uint32_t version; /* header version */ uint32_t total_size; /* total size of header */ uint32_t elf_mach; /* elf mach target */ uint32_t pad1; /* reserved */ uint32_t pid; /* JIT process id */ uint64_t timestamp; /* timestamp */ uint64_t flags; /* flags */ }; enum jit_record_type { JIT_CODE_LOAD = 0, JIT_CODE_MOVE = 1, JIT_CODE_DEBUG_INFO = 2, JIT_CODE_CLOSE = 3, JIT_CODE_UNWINDING_INFO = 4, JIT_CODE_MAX, }; /* record prefix (mandatory in each record) */ struct jr_prefix { uint32_t id; uint32_t total_size; uint64_t timestamp; }; struct jr_code_load { struct jr_prefix p; uint32_t pid; uint32_t tid; uint64_t vma; uint64_t code_addr; uint64_t code_size; uint64_t code_index; }; struct jr_code_close { struct jr_prefix p; }; struct jr_code_move { struct jr_prefix p; uint32_t pid; uint32_t tid; uint64_t vma; uint64_t old_code_addr; uint64_t new_code_addr; uint64_t code_size; uint64_t code_index; }; struct debug_entry { uint64_t addr; int lineno; /* source line number starting at 1 */ int discrim; /* column discriminator, 0 is default */ const char name[0]; /* null terminated filename, \xff\0 if same as previous entry */ }; struct jr_code_debug_info { struct jr_prefix p; uint64_t code_addr; uint64_t nr_entry; struct debug_entry entries[0]; }; struct jr_code_unwinding_info { struct jr_prefix p; uint64_t unwinding_size; uint64_t eh_frame_hdr_size; uint64_t mapped_size; const char unwinding_data[0]; }; union jr_entry { struct jr_code_debug_info info; struct jr_code_close close; struct jr_code_load load; struct jr_code_move move; struct jr_prefix prefix; struct jr_code_unwinding_info unwinding; }; static inline struct debug_entry * debug_entry_next(struct debug_entry *ent) { void *a = ent + 1; size_t l = strlen(ent->name) + 1; return a + l; } static inline char * debug_entry_file(struct debug_entry *ent) { void *a = ent + 1; return a; } #endif /* !JITDUMP_H */ gi/linux/net-next.git/log/?h=nds-private-remove&id=3c19bd6c52d441893ba19b3418825b27cfa4fd9c'>root/include/net/timewait_sock.h
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /include/sound/cs35l34.h
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/sound/cs35l34.h')