/* * This file setups defines to compile arch specific binary from the * generic one. * * The function 'LIBUNWIND__ARCH_REG_ID' name is set according to arch * name and the defination of this function is included directly from * 'arch/arm64/util/unwind-libunwind.c', to make sure that this function * is defined no matter what arch the host is. * * Finally, the arch specific unwind methods are exported which will * be assigned to each arm64 thread. */ #define REMOTE_UNWIND_LIBUNWIND /* Define arch specific functions & regs for libunwind, should be * defined before including "unwind.h" */ #define LIBUNWIND__ARCH_REG_ID(regnum) libunwind__arm64_reg_id(regnum) #define LIBUNWIND__ARCH_REG_IP PERF_REG_ARM64_PC #define LIBUNWIND__ARCH_REG_SP PERF_REG_ARM64_SP #include "unwind.h" #include "debug.h" #include "libunwind-aarch64.h" #include <../../../../arch/arm64/include/uapi/asm/perf_regs.h> #include "../../arch/arm64/util/unwind-libunwind.c" /* NO_LIBUNWIND_DEBUG_FRAME is a feature flag for local libunwind, * assign NO_LIBUNWIND_DEBUG_FRAME_AARCH64 to it for compiling arm64 * unwind methods. */ #undef NO_LIBUNWIND_DEBUG_FRAME #ifdef NO_LIBUNWIND_DEBUG_FRAME_AARCH64 #define NO_LIBUNWIND_DEBUG_FRAME #endif #include "util/unwind-libunwind-local.c" struct unwind_libunwind_ops * arm64_unwind_libunwind_ops = &_unwind_libunwind_ops; back net-next plumbingsTobias Klauser
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authorBorislav Petkov <bp@suse.de>2017-01-20 21:29:40 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-23 09:39:55 +0100
commitc26665ab5c49ad3e142e0f054ca3204f259ba09c (patch)
tree3bab11918e18e9d25ef7544dba05cdf39d1abec5 /fs/xfs/libxfs/xfs_inode_fork.c
parent7a308bb3016f57e5be11a677d15b821536419d36 (diff)
x86/microcode/intel: Drop stashed AP patch pointer optimization
This was meant to save us the scanning of the microcode containter in the initrd since the first AP had already done that but it can also hurt us: Imagine a single hyperthreaded CPU (Intel(R) Atom(TM) CPU N270, for example) which updates the microcode on the BSP but since the microcode engine is shared between the two threads, the update on CPU1 doesn't happen because it has already happened on CPU0 and we don't find a newer microcode revision on CPU1. Which doesn't set the intel_ucode_patch pointer and at initrd jettisoning time we don't save the microcode patch for later application. Now, when we suspend to RAM, the loaded microcode gets cleared so we need to reload but there's no patch saved in the cache. Removing the optimization fixes this issue and all is fine and dandy. Fixes: 06b8534cb728 ("x86/microcode: Rework microcode loading") Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170120202955.4091-2-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'fs/xfs/libxfs/xfs_inode_fork.c')