/* * POWER Data Stream Control Register (DSCR) * * This header file contains helper functions and macros * required for all the DSCR related test cases. * * Copyright 2012, Anton Blanchard, IBM Corporation. * Copyright 2015, Anshuman Khandual, IBM Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation. */ #ifndef _SELFTESTS_POWERPC_DSCR_DSCR_H #define _SELFTESTS_POWERPC_DSCR_DSCR_H #include #include #include #include #include #include #include #include #include #include #include #include "utils.h" #define THREADS 100 /* Max threads */ #define COUNT 100 /* Max iterations */ #define DSCR_MAX 16 /* Max DSCR value */ #define LEN_MAX 100 /* Max name length */ #define DSCR_DEFAULT "/sys/devices/system/cpu/dscr_default" #define CPU_PATH "/sys/devices/system/cpu/" #define rmb() asm volatile("lwsync":::"memory") #define wmb() asm volatile("lwsync":::"memory") #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) /* Prilvilege state DSCR access */ inline unsigned long get_dscr(void) { unsigned long ret; asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV)); return ret; } inline void set_dscr(unsigned long val) { asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV)); } /* Problem state DSCR access */ inline unsigned long get_dscr_usr(void) { unsigned long ret; asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR)); return ret; } inline void set_dscr_usr(unsigned long val) { asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR)); } /* Default DSCR access */ unsigned long get_default_dscr(void) { int fd = -1, ret; char buf[16]; unsigned long val; if (fd == -1) { fd = open(DSCR_DEFAULT, O_RDONLY); if (fd == -1) { perror("open() failed"); exit(1); } } memset(buf, 0, sizeof(buf)); lseek(fd, 0, SEEK_SET); ret = read(fd, buf, sizeof(buf)); if (ret == -1) { perror("read() failed"); exit(1); } sscanf(buf, "%lx", &val); close(fd); return val; } void set_default_dscr(unsigned long val) { int fd = -1, ret; char buf[16]; if (fd == -1) { fd = open(DSCR_DEFAULT, O_RDWR); if (fd == -1) { perror("open() failed"); exit(1); } } sprintf(buf, "%lx\n", val); ret = write(fd, buf, strlen(buf)); if (ret == -1) { perror("write() failed"); exit(1); } close(fd); } double uniform_deviate(int seed) { return seed * (1.0 / (RAND_MAX + 1.0)); } #endif /* _SELFTESTS_POWERPC_DSCR_DSCR_H */ /commit/?id=dd86e373e09fb16b83e8adf5c48c421a4ca76468'>root/include/net/lapb.h
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authorThomas Gleixner <tglx@linutronix.de>2017-01-31 23:58:38 +0100
committerIngo Molnar <mingo@kernel.org>2017-02-01 08:37:27 +0100
commitdd86e373e09fb16b83e8adf5c48c421a4ca76468 (patch)
tree55703c2ea8584e303e342090614e0aab3509ab21 /include/net/lapb.h
parent0b3589be9b98994ce3d5aeca52445d1f5627c4ba (diff)
perf/x86/intel/rapl: Make package handling more robust
The package management code in RAPL relies on package mapping being available before a CPU is started. This changed with: 9d85eb9119f4 ("x86/smpboot: Make logical package management more robust") because the ACPI/BIOS information turned out to be unreliable, but that left RAPL in broken state. This was not noticed because on a regular boot all CPUs are online before RAPL is initialized. A possible fix would be to reintroduce the mess which allocates a package data structure in CPU prepare and when it turns out to already exist in starting throw it away later in the CPU online callback. But that's a horrible hack and not required at all because RAPL becomes functional for perf only in the CPU online callback. That's correct because user space is not yet informed about the CPU being onlined, so nothing caan rely on RAPL being available on that particular CPU. Move the allocation to the CPU online callback and simplify the hotplug handling. At this point the package mapping is established and correct. This also adds a missing check for available package data in the event_init() function. Reported-by: Yasuaki Ishimatsu <yasu.isimatu@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Cc: Stephane Eranian <eranian@google.com> Cc: Vince Weaver <vincent.weaver@maine.edu> Fixes: 9d85eb9119f4 ("x86/smpboot: Make logical package management more robust") Link: http://lkml.kernel.org/r/20170131230141.212593966@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/net/lapb.h')