/* * Copyright 2015, Cyril Bur, IBM Corp. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include "basic_asm.h" /* long signal_self(pid_t pid, int sig); */ FUNC_START(signal_self) li r0,37 /* sys_kill */ /* r3 already has our pid in it */ /* r4 already has signal type in it */ sc bc 4,3,1f subfze r3,r3 1: blr FUNC_END(signal_self) /* long tm_signal_self(pid_t pid, int sig, int *ret); */ FUNC_START(tm_signal_self) PUSH_BASIC_STACK(8) std r5,STACK_FRAME_PARAM(0)(sp) /* ret */ tbegin. beq 1f tsuspend. li r0,37 /* sys_kill */ /* r3 already has our pid in it */ /* r4 already has signal type in it */ sc ld r5,STACK_FRAME_PARAM(0)(sp) /* ret */ bc 4,3,2f subfze r3,r3 2: std r3,0(r5) tabort. 0 tresume. /* Be nice to some cleanup, jumps back to tbegin then to 1: */ /* * Transaction should be proper doomed and we should never get * here */ li r3,1 POP_BASIC_STACK(8) blr 1: li r3,0 POP_BASIC_STACK(8) blr FUNC_END(tm_signal_self) ve' selected='selected'>nds-private-remove net-next plumbingsTobias Klauser
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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /sound/soc/sti
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'sound/soc/sti')