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authorHideo Hattori <hhatto.jp@gmail.com>2013-06-05 00:59:05 +0900
committerDaniel Borkmann <dborkman@redhat.com>2013-06-04 18:11:03 +0200
commit9e872e3f9063217487ae4db6a629b2561e4fe94a (patch)
tree745600984298d58198442bee361ad1e156992d16 /staging/cli.h
parent6c1b0eb3e6cc5a7e6f24116e386d43354c6eb98c (diff)
zsh: add zsh completion function for mausezahn
Initial zsh autocompletion support for mausezahn! Signed-off-by: Hideo Hattori <hhatto.jp@gmail.com> Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Diffstat (limited to 'staging/cli.h')
0 files changed, 0 insertions, 0 deletions
ess bit width (otherwise it can't be accessed using ANY access bit width). The problem is in acpi_tb_init_generic_address(), where the non GAS register's Length is converted into the GAS BitWidth field, its Address is converted into the GAS Address field, and the GAS AccessSize field is left 0 but most of the registers actually cannot be accessed using "ANY" accesses. As a conclusion, when AccessSize = 0 (ANY), the Address should either be aligned to the BitWidth (wrong conversion) or aligned to 32 for PIO or 64 for MMIO (real GAS). Since currently, max_bit_width is 32, then: 1. BitWidth for the wrong conversion is 8,16,32; and 2. The Address of the real GAS should always be aligned to 8,16,32. The address alignment check to exclude false matched real GAS is not necessary. Thus this patch fixes the issue by removing the address alignment check. On the other hand, we in fact could use a simpler check of "reg->bit_width < max_bit_width" to exclude the "BitWidth=64 PIO" case that may be issued from acpi_read()/acpi_write() in the future. Fixes: b314a172ee96 (ACPICA: Hardware: Add optimized access bit width support) Reported-and-tested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Acked-by: Mike Marshall <hubcap@omnibond.com> Suggested-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'Documentation/DocBook')