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-rw-r--r--taia.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/taia.h b/taia.h
index 7440418..5d79cb3 100644
--- a/taia.h
+++ b/taia.h
@@ -96,7 +96,9 @@ static inline void taia_unpack(unsigned char *s, struct taia *t)
t->nano = x;
}
-#define tai_unix(t, u) ((void) ((t)->x = 4611686018427387914ULL + (uint64_t) (u)))
+#define tai_unix(t, u) \
+ ((void) ((t)->x = 4611686018427387914ULL + \
+ (uint64_t) (u)))
static inline void taia_now(struct taia *t)
{
@@ -106,6 +108,7 @@ static inline void taia_now(struct taia *t)
tai_unix(&t->sec, now.tv_sec);
t->nano = 1000 * now.tv_usec + 500;
+ /* We don't really have it, but bring some noise in. */
t->atto = secrand();
}
to exclude false matched real GAS is not necessary. Thus this patch fixes the issue by removing the address alignment check. On the other hand, we in fact could use a simpler check of "reg->bit_width < max_bit_width" to exclude the "BitWidth=64 PIO" case that may be issued from acpi_read()/acpi_write() in the future. Fixes: b314a172ee96 (ACPICA: Hardware: Add optimized access bit width support) Reported-and-tested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Acked-by: Mike Marshall <hubcap@omnibond.com> Suggested-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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