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generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-11-20 00:11:34 +0000
rsons <lost.distance@yahoo.com>2016-04-02 11:08:06 +0100 committerJani Nikula <jani.nikula@intel.com>2016-04-05 11:05:07 +0300 commit87707cfdc387681dc702f00dfcffc26ca0bc5f71 (patch) treed8611707d153faab1a4a8ead81219a5d0bf24573 /Documentation/.gitignore parentd59a1f71ff1aeda4b4630df92d3ad4e3b1dfc885 (diff)
drm/edid: Fix EDID Established Timings I and II
Three of the VESA DMT timings in edid_est_modes[] are slightly off. 1. 640x480@72Hz vsync_end should be 492, not 491. 2. 640x480@60Hz clock should be 25175, not 25200. 3. 1024x768@75Hz clock should be 78750, not 78800. This patch corrects those timings per the VESA DMT specification, and thus brings them into line with the identical timings in drm_dmt_modes[]. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160402100817.B60776E23A@gabe.freedesktop.org
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