ASoC: cs42l56: Make ID registers volatile and remove cache bypass

Rather than manually enabling cache bypass when reading the ID registers
simply remove the default which will cause the first read to go to the
hardware. The old code worked this is simply the more standard way to
implement this.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Brian Austin <brian.austin@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

0 files changed, 0 insertions, 0 deletions