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lspan='2' class='oid'>8d29bdba7291f9f939bc17ac088ab650d106d451 (diff)
ARM: OMAP: DRA7: powerdomain data: Set L3init and L4per to ON
As per the latest revision F of public TRM for DRA7/AM57xx SoCs SPRUHZ6F[1] (April 2016), L4Per and L3init power domains now operate in always "ON" mode due to asymmetric aging limitations. Update the same [1] http://www.ti.com/lit/pdf/spruhz6 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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