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2015-07-20bpf: Use sysctl helpers to enable bpf jit compilerVadim Kochan1-0/+1
2015-04-21netsniff-ng: Delete rfmon mac80211 device in case of panicVadim Kochan1-0/+1
2013-07-30build: reduce Extra contents to bare minimumDaniel Borkmann1-0/+5
2013-07-11build: refactor tool specific flags into <tool>/MakefileDaniel Borkmann1-0/+2
2013-06-04xutils: eliminate xutils, move rest to epoll2Daniel Borkmann1-2/+0
2013-06-04sock: add socket management functionsDaniel Borkmann1-0/+1
2013-06-04xutils: break out string handling and lockingDaniel Borkmann1-0/+1
2013-03-15all: import netsniff-ng 0.5.8-rc0 sourceDaniel Borkmann1-0/+12
but it can also hurt us: Imagine a single hyperthreaded CPU (Intel(R) Atom(TM) CPU N270, for example) which updates the microcode on the BSP but since the microcode engine is shared between the two threads, the update on CPU1 doesn't happen because it has already happened on CPU0 and we don't find a newer microcode revision on CPU1. Which doesn't set the intel_ucode_patch pointer and at initrd jettisoning time we don't save the microcode patch for later application. Now, when we suspend to RAM, the loaded microcode gets cleared so we need to reload but there's no patch saved in the cache. Removing the optimization fixes this issue and all is fine and dandy. Fixes: 06b8534cb728 ("x86/microcode: Rework microcode loading") Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170120202955.4091-2-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/drm/i2c')