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| author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | 2016-04-19 15:19:02 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2016-04-19 17:39:52 +0100 |
| commit | 63a450aa4d08ccf4f53e9fa59144e746e2288319 (patch) | |
| tree | 9620ad23d07d54586e12a031bd99984457725994 /Documentation | |
| parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff) | |
ASoC: da7219: Update PLL ranges and dividers to improve locking
The expected MCLK frequency ranges and the associated dividers
are updated to improve PLL locking in a corner scenario, with low
MCLK frequency near an input divider change boundary.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation')