#ifndef STR_H #define STR_H #include "built_in.h" extern size_t strlcpy(char *dest, const char *src, size_t size); extern int slprintf(char *dst, size_t size, const char *fmt, ...) __check_format_printf(3, 4); extern int slprintf_nocheck(char *dst, size_t size, const char *fmt, ...); extern char *strtrim_right(char *p, char c); extern noinline void *xmemset(void *s, int c, size_t n); #endif /* STR_H */ /linux/net-next.git' title='net-next.git Git repository'/>
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authorStefan Agner <stefan@agner.ch>2016-10-17 18:51:27 -0700
committerShawn Guo <shawnguo@kernel.org>2016-10-24 20:05:32 +0800
commit44d524218c65e1f2e6d945b09165562852298015 (patch)
tree85d12c637cc229a76cfb68ffb4e459c654106cc2
parentf9d1f7a7ad919c93dfb708aae6e19d33c5437443 (diff)
ARM: dts: vf610: fix IRQ flag of global timer
The global timer IRQ (PPI[0], PPI 11 in device tree terms) is a rising edge interrupt. The ARM Cortex-A5 MPCore TRM in Chapter 10.1.2. Interrupt types and sources says: "Interrupt is rising-edge sensitive." The bits seem to be read-only, hence this missconfiguration had no negative effect. However, with commit 992345a58e0c ("irqchip/gic: WARN if setting the interrupt type for a PPI fails") warnings such as this get printed: GIC: PPI11 is secure or misconfigured With this change the new configuration matches the default configuration and no warning is printed anymore. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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