diff options
| author | Chris Brandt <chris.brandt@renesas.com> | 2016-12-15 12:00:27 -0500 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-12-21 16:33:14 -0800 |
| commit | e2a33c34ddff22ee208d80abdd12b88a98d6cb60 (patch) | |
| tree | 60f1a5bbbcda32a59d06d548c749b4f3f9f7e5f4 /Documentation/i2c/fault-codes | |
| parent | 2aab7a2055a1705c9e30920d95a596226999eb21 (diff) | |
clk: renesas: mstp: Support 8-bit registers for r7s72100
The RZ/A1 is different than the other Renesas SOCs because the MSTP
registers are 8-bit instead of 32-bit and if you try writing values as
32-bit nothing happens...meaning this driver never worked for r7s72100.
Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'Documentation/i2c/fault-codes')