#ifndef TRAFGEN_L3_H #define TRAFGEN_L3_H enum ip4_field { IP4_VER, IP4_IHL, IP4_DSCP, IP4_ECN, IP4_TOS, IP4_LEN, IP4_ID, IP4_FLAGS, IP4_MF, IP4_DF, IP4_FRAG_OFFS, IP4_TTL, IP4_PROTO, IP4_CSUM, IP4_SADDR, IP4_DADDR, }; enum ip6_field { IP6_VER, IP6_CLASS, IP6_FLOW_LBL, IP6_LEN, IP6_NEXT_HDR, IP6_HOP_LIMIT, IP6_SADDR, IP6_DADDR, }; extern void protos_l3_init(void); #endif /* TRAFGEN_L2_H */ tom+xml'/>
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authorLaxman Dewangan <ldewangan@nvidia.com>2016-04-05 15:09:48 +0530
committerMark Brown <broonie@kernel.org>2016-04-05 11:39:25 -0700
commitfd786fb0276a22155058018f76eb4c665d37f170 (patch)
treec2496f420dc91e196a1a0afe71f9b6d5071c7ad5 /Documentation/filesystems
parent5bf59bd5e9a5b262110df8c1ea5ad8820d7d524a (diff)
regulator: pwm: Try to avoid voltage error in duty cycle calculation
In continuous mode of the PWM regulators, the requested voltage PWM duty cycle is calculated in terms of 100% scale where entire range denotes 100%. The calculation for PWM pulse ON time(duty_pulse) is done as: duty_cycle = ((requested - minimum) * 100) / voltage_range. then duty pulse is calculated as duty_pulse = (pwm_period/100) * duty_cycle This leads to the calculation error if we have the requested voltage where accurate pulse time is possible. For example: Consider following case voltage range is 800000uV to 1350000uV. pwm-period = 1550ns (1ns time is 1mV). Requested 900000uV. duty_cycle = ((900000uV - 800000uV) * 100)/ 1550000 = 6.45 but we will get 6. duty_pulse = (1550/100) * 6 = 90 pulse time. 90 pulse time is equivalent to 90mV and this gives us pulse time equivalent to 890000uV instead of 900000uV. Proposing the solution in which if requested voltage makes the accurate duty pulse then there will not be any error. On this case, if (req_uV - min_uV) * pwm_period is perfect dividable by voltage_range then get the duty pulse time directly. duty_pulse = ((900000uV - 800000uV) * 1550)/1550000) = 100 and this is equivalent to 100mV and so final voltage is (800000 + 100000) = 900000uV which is same as requested, Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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