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path: root/crypto.h
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#ifndef CRYPTO_H
#define CRYPTO_H

#include "taia.h"
#include "crypto_verify_32.h"
#include "crypto_hash_sha512.h"
#include "crypto_box_curve25519xsalsa20poly1305.h"
#include "crypto_scalarmult_curve25519.h"
#include "crypto_auth_hmacsha512256.h"

#define crypto_box_zerobytes		crypto_box_curve25519xsalsa20poly1305_ZEROBYTES
#define crypto_box_boxzerobytes		crypto_box_curve25519xsalsa20poly1305_BOXZEROBYTES
#define crypto_box_noncebytes		crypto_box_curve25519xsalsa20poly1305_NONCEBYTES
#define crypto_box_beforenmbytes	crypto_box_curve25519xsalsa20poly1305_BEFORENMBYTES
#define crypto_box_beforenm		crypto_box_curve25519xsalsa20poly1305_beforenm
#define crypto_box_afternm		crypto_box_curve25519xsalsa20poly1305_afternm
#define crypto_box_open_afternm		crypto_box_curve25519xsalsa20poly1305_open_afternm
#define crypto_box_pub_key_size		crypto_box_curve25519xsalsa20poly1305_PUBLICKEYBYTES
#define crypto_box_sec_key_size		crypto_box_curve25519xsalsa20poly1305_SECRETKEYBYTES

#define NONCE_LENGTH			(sizeof(struct taia))
#define NONCE_RND_LENGTH		(crypto_box_boxzerobytes - NONCE_LENGTH)
#define NONCE_ALL_LENGTH		(crypto_box_boxzerobytes + NONCE_LENGTH)
#define NONCE_OFFSET			(crypto_box_noncebytes - NONCE_LENGTH)
#define NONCE_EDN_OFFSET(x)		((x) + NONCE_OFFSET)
#define NONCE_PKT_OFFSET(x)		((x) + NONCE_RND_LENGTH)

#endif /* CRYPTO_H */
='oid'>c666f7a26b860674848949e39a610222b0723f89 /include/net/Space.h parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/net/Space.h')