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authorDavid Daney <david.daney@cavium.com>2016-04-11 16:29:32 -0700
committerBjorn Helgaas <bhelgaas@google.com>2016-05-02 12:31:53 -0500
commit93bf9073a8a7e844b27327b05ab4dc608354d6fd (patch)
treefcb8f5302f4d0d140d3ad81d3a65d11755248a90
parent9735a22799b9214d17d3c231fe377fc852f042e9 (diff)
PCI: thunder: Don't clobber read-only bits in bridge config registers
The 32-bit addressing modes in the I/O and Prefetchable Memory registers are required to be read-only. Since the underlying access method allows them to be set, emulate their read-only nature and always set them. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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