summaryrefslogtreecommitdiff
path: root/instruction.h
diff options
context:
space:
mode:
Diffstat (limited to 'instruction.h')
-rw-r--r--instruction.h288
1 files changed, 178 insertions, 110 deletions
diff --git a/instruction.h b/instruction.h
index 2253c86..7b5d510 100644
--- a/instruction.h
+++ b/instruction.h
@@ -1,120 +1,188 @@
/*
- Nios-sim - one simple NIOSII simulator only for personal interest and fun.
- Copyright (C) 2010 chysun2000@gmail.com
+ * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
+ * Copyright (C) 2010 chysun2000@gmail.com
+ *
+ * This file is part of nios2sim-ng.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
+#ifndef _INSTRUCTION_H_
+#define _INSTRUCTION_H_
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
+/*
+ * Instruction Word Formats
+ */
+
+/* I-Type instruction */
+struct i_type {
+ uint8_t op:6;
+ uint16_t imm16;
+ uint8_t b:5;
+ uint8_t a:5;
+} __packed;
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-*/
+/* R-Type instruction */
+struct r_type {
+ uint8_t op:6;
+ /*
+ * Some R-Type instructions embed a small immediate value in the
+ * low-order bits of OPX.
+ */
+ union {
+ uint16_t opx11:11;
+ struct {
+ uint8_t n:5;
+ uint8_t opx6:6;
+ } __packed;
+ } opx;
+ uint8_t c:5;
+ uint8_t b:5;
+ uint8_t a:5;
+} __packed;
-#ifndef __INSTRUCTION_H__
-#define __INSTRUCTION_H__
+/* J-Type instruction */
+struct j_type {
+ uint8_t op:6;
+ uint32_t imm26:26;
+} __packed;
+
+/*
+ * Instruction Opcodes
+ */
-/*--J_TYPE-------------------------------------------------------------*/
-/*--R_TYPE-------------------------------------------------------------*/
-enum OPX_TYPE_INSTR{
- ERET = 0x01,
- ROLI = 0x02,
- ROL = 0x03,
- FLUSHP = 0x04,
- RET = 0x05,
- NOR = 0x06,
- MULXUU = 0x07,
- CMPGE = 0x08,
- BRET = 0x09,
- ROR=0x0B,
- FLUSHI=0x0c,
- JMP=0x0d,
- AND=0x0e,
- CMPLT = 0x10,
- SLLI = 0x12,
- SLL=0x13,
- WRPRS = 0x14,
- OR = 0x16,
- MULXSU=0x17,
- CMPNE=0x18,
- SRLI = 0x1A,
- SRL=0x1b,
- NEXTPC=0x1c,
- CALLR = 0x1D,
- XOR=0x1e,
- MULXSS=0x1f,
- CMPEQ=0x20,
- DIVU = 0x24,
- DIV=0x25,
- RDCTL,
- MUL,
- CMPGEU,
- INITI,
- TRAP = 0x2D,
- WRCTL,
- CMPLTU = 0x30,
- ADD,
- BREAK = 0x34,
- SYNC = 0x36,
- SUB = 0x39,
- SRAI = 0x3A,
- SRA=0x3b
+/* OPX Encodings for R-Type instructions */
+enum {
+ /* 0x00 */
+ ERET = 0x01,
+ ROLI = 0x02,
+ ROL = 0x03,
+ FLUSHP = 0x04,
+ RET = 0x05,
+ NOR = 0x06,
+ MULXUU = 0x07,
+ CMPGE = 0x08,
+ BRET = 0x09,
+ /* 0x0A */
+ ROR = 0x0B,
+ FLUSHI = 0x0C,
+ JMP = 0x0D,
+ AND = 0x0E,
+ /* 0x0F */
+ CMPLT = 0x10,
+ /* 0x11 */
+ SLLI = 0x12,
+ SLL = 0x13,
+ /* 0x14 */
+ /* 0x15 */
+ OR = 0x16,
+ MULXSU = 0x17,
+ CMPNE = 0x18,
+ /* 0x19 */
+ SRLI = 0x1A,
+ SRL = 0x1B,
+ NEXTPC = 0x1C,
+ CALLR = 0x1D,
+ XOR = 0x1E,
+ MULXSS = 0x1F,
+ CMPEQ = 0x20,
+ /* 0x21 */
+ /* 0x22 */
+ /* 0x23 */
+ DIVU = 0x24,
+ DIV = 0x25,
+ RDCTL = 0x26,
+ MUL = 0x27,
+ CMPGEU = 0x28,
+ INITI = 0x29,
+ /* 0x2A */
+ /* 0x2B */
+ /* 0x2C */
+ TRAP = 0x2D,
+ WRCTL = 0x2E,
+ /* 0x2F */
+ CMPLTU = 0x30,
+ ADD = 0x31,
+ /* 0x32 */
+ /* 0x33 */
+ BREAK = 0x34,
+ /* 0x35 */
+ SYNC = 0x36,
+ /* 0x37 */
+ /* 0x38 */
+ SUB = 0x39,
+ SRAI = 0x3A,
+ SRA = 0x3b,
};
-/*--I_TYPE-------------------------------------------------------------*/
-enum OP_TYPE_INSTR{
- CALL = 0x00,
- JMPI = 0x01,
- LDBU = 0x03,
- ADDI = 0x04,
- STB = 0x05,
- BR = 0x06,
- LDB = 0x07,
- CMPGEI = 0x08,
- LDHU = 0x0B,
- ANDI = 0x0C,
- STH = 0x0D,
- BGE = 0x0E,
- LDH = 0x0F,
- CMPLTI = 0x10,
- INITDA = 0x13,
- ORI,
- STW,
- BLT,
- LDW,
- CMPNEI=0x18,
+
+/*
+ * OP Encodings for I-Type instructions (except for CALL, which is a J-type
+ * instruction)
+ */
+enum {
+ CALL = 0x00, /* J-type */
+ JMPI = 0x01,
+ /* 0x02 */
+ LDBU = 0x03,
+ ADDI = 0x04,
+ STB = 0x05,
+ BR = 0x06,
+ LDB = 0x07,
+ CMPGEI = 0x08,
+ /* 0x09 */
+ /* 0x0A */
+ LDHU = 0x0B,
+ ANDI = 0x0C,
+ STH = 0x0D,
+ BGE = 0x0E,
+ LDH = 0x0F,
+ CMPLTI = 0x10,
+ /* 0x11 */
+ /* 0x12 */
+ INITDA = 0x13,
+ ORI = 0x14,
+ STW = 0x15,
+ BLT = 0x16,
+ LDW = 0x17,
+ CMPNEI = 0x18,
+ /* 0x19 */
+ /* 0x1A */
FLUSHDA = 0x1B,
- XORI = 0x1C,
- BNE = 0x1E,
- CMPEQI = 0x20,
- LDBUIO = 0x23,
- MULI,
- STBIO,
- BEQ,
- LDBIO,
- CMPGEUI=0x28,
- LDHUIO = 0x2B,
- ANDHI = 0x2C,
- STHIO = 0x2D,
- BGEU = 0x2E,
- LDHIO = 0x2F,
- CMPLTUI = 0x30,
- CUSTOM = 0x32,
- INITD,
- ORHI,
- STWIO,
- BLTU,
- LDWIO,
- RDPRS,
- R_TYPE = 0x3A,
- FLUSHD = 0x3B,
- XORHI = 0x3C
+ XORI = 0x1C,
+ /* 0x1D */
+ BNE = 0x1E,
+ /* 0x1F */
+ CMPEQI = 0x20,
+ /* 0x21 */
+ /* 0x22 */
+ LDBUIO = 0x23,
+ MULI = 0x24,
+ STBIO = 0x25,
+ BEQ = 0x26,
+ LDBIO = 0x27,
+ CMPGEUI = 0x28,
+ /* 0x29 */
+ /* 0x2A */
+ LDHUIO = 0x2B,
+ ANDHI = 0x2C,
+ STHIO = 0x2D,
+ BGEU = 0x2E,
+ LDHIO = 0x2F,
+ CMPLTUI = 0x30,
+ /* 0x31 */
+ CUSTOM = 0x32,
+ INITD = 0x33,
+ ORHI = 0x34,
+ STWIO = 0x35,
+ BLTU = 0x36,
+ LDWIO = 0x37,
+ /* 0x38 */
+ /* 0x39 */
+ R_TYPE = 0x3A,
+ FLUSHD = 0x3B,
+ XORHI = 0x3C,
};
-#endif
-
+#endif /* _INSTRUCTION_H_ */