diff options
Diffstat (limited to 'uart_core.h')
| -rw-r--r-- | uart_core.h | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/uart_core.h b/uart_core.h new file mode 100644 index 0000000..4cab207 --- /dev/null +++ b/uart_core.h @@ -0,0 +1,79 @@ +/* + Nios-sim - one simple NIOSII simulator only for personal interest and fun. + Copyright (C) 2010 chysun2000@gmail.com + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. +*/ + +#ifndef __UART_CORE_H__ +#define __UART_CORE_H__ + +#include <stdio.h> +#include "public.h" +#include "niosii.h" +#include "io_device.h" + +#define UART_IRQ_MASK (1 << 2) +#define UART_CORE_BASE_ADDR (0x80681000) +#define UART_CORE_REG_CNT (8) + +/* Mask for registers */ +/* copy from /drivers/serial/altuart.c */ +#define ALTERA_UART_STATUS_PE_MSK (0x1) +#define ALTERA_UART_STATUS_FE_MSK (0x2) +#define ALTERA_UART_STATUS_BRK_MSK (0x4) +#define ALTERA_UART_STATUS_ROE_MSK (0x8) +#define ALTERA_UART_STATUS_TOE_MSK (0x10) +#define ALTERA_UART_STATUS_TMT_MSK (0x20) +#define ALTERA_UART_STATUS_TRDY_MSK (0x40) +#define ALTERA_UART_STATUS_RRDY_MSK (0x80) +#define ALTERA_UART_STATUS_E_MSK (0x100) +#define ALTERA_UART_STATUS_DCTS_MSK (0x400) +#define ALTERA_UART_STATUS_CTS_MSK (0x800) +#define ALTERA_UART_STATUS_EOP_MSK (0x1000) + +#define ALTERA_UART_CONTROL_PE_MSK (0x1) +#define ALTERA_UART_CONTROL_FE_MSK (0x2) +#define ALTERA_UART_CONTROL_BRK_MSK (0x4) +#define ALTERA_UART_CONTROL_ROE_MSK (0x8) +#define ALTERA_UART_CONTROL_TOE_MSK (0x10) +#define ALTERA_UART_CONTROL_TMT_MSK (0x20) +#define ALTERA_UART_CONTROL_TRDY_MSK (0x40) +#define ALTERA_UART_CONTROL_RRDY_MSK (0x80) +#define ALTERA_UART_CONTROL_E_MSK (0x100) +#define ALTERA_UART_CONTROL_TRBK_MSK (0x200) +#define ALTERA_UART_CONTROL_DCTS_MSK (0x400) +#define ALTERA_UART_CONTROL_RTS_MSK (0x800) +#define ALTERA_UART_CONTROL_EOP_MSK (0x1000) + +#define ALTERA_UART_EOP_MSK (0xFF) +#define ALTERA_UART_EOP_OFST (0) + +#define UART_HAS_NO_DATA_TO_RX (0x00) +#define UART_HAS_DATA_TO_RX (0x01) +#define UART_HAS_DATA_TO_TX (0x01) +#define UART_HAS_NO_DATA_TO_TX (0x00) + +struct uart_core_hw { + struct io_reg io_regs[UART_CORE_REG_CNT]; + uint32_t rx_status; + uint32_t tx_status; +}; + +extern struct io_device uart_core; +#endif + + + |