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authorTobias Klauser <tklauser@distanz.ch>2012-05-03 08:42:48 +0200
committerTobias Klauser <tklauser@distanz.ch>2012-05-03 08:42:48 +0200
commit134933c6336efed17dde077df3a9a3233b620bae (patch)
treeb078df5a981484810366c6d252a1f684f1af34c6 /devicetree
parente37253570ba921aa4379ae25999fc04c2af6e7e2 (diff)
Add GPIOs etc.
Diffstat (limited to 'devicetree')
-rw-r--r--devicetree/dionysos_nios2mmu.dts71
1 files changed, 53 insertions, 18 deletions
diff --git a/devicetree/dionysos_nios2mmu.dts b/devicetree/dionysos_nios2mmu.dts
index 9549bc1..98b05f4 100644
--- a/devicetree/dionysos_nios2mmu.dts
+++ b/devicetree/dionysos_nios2mmu.dts
@@ -41,17 +41,17 @@
0x04802000 0x00000800>;
};
sopc@0 {
+ ranges ;
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "ALTR,avalon","simple-bus";
- ranges ;
bus-frequency = < 50000000 >;
//Port instruction_master of cpu_0
- epcs_flash_controller_0: spi@0x5000400 {
+ epcs_flash_controller_0: flash@0x5000400 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "ALTR,spi-9.1","ALTR,spi-1.0";
+ compatible = "ALTR,epcs_flash-9.1";
reg = < 0x5000400 0x800>;
interrupt-parent = < &cpu_0 >;
interrupts = < 1 >;
@@ -60,7 +60,7 @@
compatible = "m25p80";
reg = <0>;
};
- }; //end spi (epcs_flash_controller_0)
+ }; //end flash (epcs_flash_controller_0)
cfi_flash_0: flash@0x4000000 {
compatible = "ALTR,cfi_flash-9.1","cfi-flash";
@@ -104,9 +104,8 @@
ALTR,tx-fifo-depth = <1024>; //embeddedsw.CMacro.TRANSMIT_FIFO_DEPTH type NUMBER
address-bits = <48>;
max-frame-size = <1518>;
- local-mac-address = [ 00 15 12 01 42 23 ];
- ALTR,mii-id = <0>; // manually added
- ALTR,phy-addr = <2>; // manually added
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ ALTR,mii-id = <0>;
}; //end ethernet (tse_mac)
watchdog_timer: watchdog@0x4880000 {
@@ -124,23 +123,59 @@
}; //end sysid (sysid)
ISP1362: isp1362@0x8220000 {
- compatible = "nxp,usb-isp1362";
- reg = < 0x8220000 0x4 0x8220004 0x4>; // manually adjusted
+ compatible = "nxp,isp1362-1.0","nxp,usb-isp1362";
+ reg = < 0x8220000 0x04 0x8220004 0x04 0x8220020 0x04 0x8220024 0x04>;
interrupt-parent = < &cpu_0 >;
- interrupts = < 7 8 >;
- nxp,sel15Kres;
-// nxp,clknotstop;
-// nxp,oc_enable;
-// nxp,int_act_high;
-// nxp,int_edge_triggered;
-// nxp,remote_wakeup_connected;
- nxp,no_power_switching;
-// nxp,power_switching_mode;
+ interrupts = < 8 7 >;
}; //end isp1362 (ISP1362)
+ pio_out: gpio@0x8240000 {
+ compatible = "ALTR,pio-9.1","ALTR,pio-1.0";
+ reg = < 0x8240000 0x20>;
+ width = <2>; //width type NUMBER
+ resetvalue = <0>; //resetValue type NUMBER
+ #gpio-cells = <2>;
+ gpio-controller;
+ }; //end gpio (pio_out)
+
+ pio_in: gpio@0x8240020 {
+ compatible = "ALTR,pio-9.1","ALTR,pio-1.0";
+ reg = < 0x8240020 0x10>;
+ interrupt-parent = < &cpu_0 >;
+ interrupts = < 9 >;
+ width = <2>; //width type NUMBER
+ resetvalue = <0>; //resetValue type NUMBER
+ #gpio-cells = <2>;
+ gpio-controller;
+ }; //end gpio (pio_in)
+
+ pio_leds: gpio@0x4400020 {
+ compatible = "ALTR,pio-9.1","ALTR,pio-1.0";
+ reg = < 0x4400020 0x20>;
+ width = <16>; //width type NUMBER
+ resetvalue = <0>; //resetValue type NUMBER
+ #gpio-cells = <2>;
+ gpio-controller;
+ }; //end gpio (pio_leds)
+
+ leds {
+ compatible = "gpio-leds";
+ heartbeat {
+ label = "heartbeat";
+ gpios = <&pio_leds 6 0>;
+ linux,default-trigger = "heartbeat";
+ };
+ blinky {
+ label = "blinky";
+ gpios = <&pio_leds 5 0>;
+ linux,default-trigger = "timer";
+ };
+ };
+
//Port tightly_coupled_data_master_0 of cpu_0
}; //sopc
chosen {
bootargs = "debug console=ttyAL0,115200";
+ //bootargs = "debug kgdboc=ttyAL0,115200 kgdbwait console=ttyJ0,115200";
};
};