path: root/quartus
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authorTobias Klauser <>2012-05-03 08:41:32 +0200
committerTobias Klauser <>2012-05-03 08:41:32 +0200
commite37253570ba921aa4379ae25999fc04c2af6e7e2 (patch)
tree85b53ec97605377290e88f1fa57784e8697d05b4 /quartus
parent98feedbabc40f4faea1654419ddf6748ee850955 (diff)
Add custom instructions ffs, ffz, fls and hweight
Diffstat (limited to 'quartus')
0 files changed, 0 insertions, 0 deletions
ass='logsubject'>MIPS: Add struct pci_ops member names to initializationRob Herring1-2/+2 Some instances of pci_ops initialization rely on the read/write members' location in the struct. This is fragile and may break when adding new members to the beginning of the struct. [ indent = with tabs for consistency.] Signed-off-by: Rob Herring <> Cc: Cc: Cc: Arnd Bergmann <> Cc: Cc: Bjorn Helgaas <> Patchwork: Signed-off-by: Ralf Baechle <> 2014-11-20treewide: fix typo in printk and KconfigMasanari Iida1-1/+1 This patch fix spelling typo in printk and Kconfig within various part of kernel sources. Signed-off-by: Masanari Iida <> Acked-by: Randy Dunlap <> Signed-off-by: Jiri Kosina <> 2013-08-26MIPS: cavium-octeon: fix I/O space setup on non-PCI systemsAaro Koskinen1-4/+5 Fix I/O space setup, so that on non-PCI systems using inb()/outb() won't crash the system. Some drivers may try to probe I/O space and for that purpose we can just allocate some normal memory initially. Drivers trying to reserve a region will fail early as we set the size to 0. If a real I/O space is present, the PCI/PCIe support code will re-adjust the values accordingly. Tested with EdgeRouter Lite by enabling CONFIG_SERIO_I8042 that caused the originally reported crash. Reported-by: Faidon Liambotis <> Signed-off-by: Aaro Koskinen <> Acked-by: David Daney <> Cc: Patchwork: Signed-off-by: Ralf Baechle <> 2013-02-01MIPS: Whitespace cleanup.Ralf Baechle1-15/+15 Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <> 2012-12-13MIPS/EDAC: Improve OCTEON EDAC support.David Daney1-1/+2 Some initialization errors are reported with the existing OCTEON EDAC support patch. Also some parts have more than one memory controller. Fix the errors and add multiple controllers if present. Signed-off-by: David Daney <> 2012-12-12MIPS: Cavium: Add EDAC support.Ralf Baechle1-0/+4 Drivers for EDAC on Cavium. Supported subsystems are: o CPU primary caches. These are parity protected only, so only error reporting. o Second level cache - ECC protected, provides SECDED. o Memory: ECC / SECDEC if used with suitable DRAM modules. The driver will will only initialize if ECC is enabled on a system so is safe to run on non-ECC memory. o PCI: Parity error reporting Since it is very hard to test this sort of code the implementation is very conservative and uses polling where possible for now. Signed-off-by: Ralf Baechle <> Reviewed-by: Borislav Petkov <> 2012-10-06sections: fix section conflicts in arch/mipsAndi Kleen1-1/+1 Signed-off-by: Andi Kleen <> Cc: Ralf Baechle <> Signed-off-by: Andrew Morton <> Signed-off-by: Linus Torvalds <> 2012-08-23MIPS: PCI: Use PCI Express Capability accessorsJiang Liu1-10/+5 Use PCI Express Capability access functions to simplify MIPS PCIe code. Signed-off-by: Jiang Liu <> Signed-off-by: Bjorn Helgaas <> Acked-by: David Daney <> 2011-12-08MIPS: Octeon: Update PCI Latency timer and enable more error reporting.David Daney1-10/+6 Signed-off-by: David Daney <> Cc: Patchwork: Patchwork: Signed-off-by: Ralf Baechle <> 2011-03-31Fix common misspellingsLucas De Marchi1-2/+2 Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <> 2010-10-29MIPS: Octeon: Rewrite DMA mapping functions.David Daney1-6/+54 All Octeon chips can support more than 4GB of RAM. Also due to how Octeon PCI is setup, even some configurations with less than 4GB of RAM will have portions that are not accessible from 32-bit devices. Enable the swiotlb code to handle the cases where a device cannot directly do DMA. This is a complete rewrite of the Octeon DMA mapping code. Signed-off-by: David Daney <> Patchwork: Signed-off-by: Ralf Baechle <>