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# Makefile for inotail
#
# Copyright (C) 2006-2009 Tobias Klauser <tklauser@distanz.ch>
#
# Licensed under the terms of the GNU General Public License; version 2 or later.

P = inotail
VERSION	= 0.6

# Paths
prefix	= /usr/local
BINDIR	= $(prefix)/bin
MANDIR	= $(prefix)/share/man/man1

CC	:= gcc
CFLAGS	:= $(CFLAGS) -pipe -D_USE_SOURCE -DVERSION="\"$(VERSION)\"" -W -Wall \
	   -Wextra -Wstrict-prototypes -Wsign-compare -Wshadow -Wchar-subscripts \
	   -Wmissing-declarations -Wpointer-arith -Wcast-align -Wmissing-prototypes

# Compile with 'make DEBUG=true' to enable debugging
DEBUG = false
ifeq ($(strip $(DEBUG)),true)
	CFLAGS  += -g -DDEBUG
endif

all: $(P)
$(P): $(P).o

%.o: %.c %.h
	$(CC) $(CFLAGS) -c $< -o $@

install: $(P)
	install -m 775 -D $(P) $(BINDIR)/$(P)
	install -m 644 -D $(P).1 $(MANDIR)/$(P).1
	gzip -9 $(MANDIR)/$(P).1

uninstall:
	rm $(BINDIR)/$(P) $(MANDIR)/$(P).1*

cscope:
	cscope -b

archive:
	git archive --format=tar --prefix=$(P)-$(VERSION)/ HEAD | gzip -9v > ../$(P)-$(VERSION).tar.gz
	git archive --format=tar --prefix=$(P)-$(VERSION)/ HEAD | bzip2 -9v > ../$(P)-$(VERSION).tar.bz2

checksum: archive
	(cd ..; \
		sha1sum $(P)-$(VERSION).tar.gz > $(P)-$(VERSION).tar.gz.sha1; \
		sha1sum $(P)-$(VERSION).tar.bz2 > $(P)-$(VERSION).tar.bz2.sha1)

signature: archive
	(cd ..; \
		gpg -a --detach-sign $(P)-$(VERSION).tar.gz; \
		gpg -a --detach-sign $(P)-$(VERSION).tar.bz2)

release: archive checksum signature

clean:
	rm -f $(P) *.o cscope.*
clk/rockchip/clk.h?id=ef1d9feeccc094f59b72bb11fe14ec886eb574d3'>clk: rockchip: Add support for multiple clock providersXing Zheng1-13/+38 2016-03-27clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng1-0/+6 2016-03-27clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE typeXing Zheng1-0/+16 2016-02-04clk: rockchip: add a factor clock typeHeiko Stuebner1-0/+28 2016-01-02Merge branch 'clk-rockchip' into clk-nextMichael Turquette1-1/+1 2016-01-02clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner1-1/+1 2015-12-23Merge branch 'clk-rockchip' into clk-nextMichael Turquette1-0/+19 2015-12-23clk: rockchip: handle mux dependency of fractional dividersHeiko Stuebner1-0/+19 2015-12-21clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner1-1/+1 2015-12-12clk: rockchip: add clock controller for rk3228Jeffy Chen1-1/+10 2015-11-23clk: rockchip: add clock controller for rk3036Xing Zheng1-1/+8 2015-11-23clk: rockchip: add new pll-type for rk3036 and similar socsXing Zheng1-0/+23 2015-07-28clk: rockchip: Fix PLL bandwidthDouglas Anderson1-4/+4 2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd1-2/+2 2015-07-20clk: rockchip: Properly include clk.hStephen Boyd1-2/+2 2015-07-06clk: rockchip: add rk3368 clock controllerHeiko Stuebner1-0/+16 2015-07-06clk: rockchip: add support for phase invertersHeiko Stuebner1-0/+20 2015-07-06clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variantHeiko Stuebner1-0/+20 2015-07-06clk: rockchip: protect register macros against multipart valuesHeiko Stuebner1-8/+8 2015-06-04clk: make several parent names constUwe Kleine-König1-10/+10 2015-04-12clk: don't use __initconst for non-const arraysUwe Kleine-König1-2/+2 2014-11-28clk: rockchip: Add support for the mmc clock phases using the frameworkAlexandru M Stan1-0/+23 2014-11-25clk: rockchip: add optional sync to pll rate parametersHeiko Stuebner1-0/+6 2014-11-25clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner1-2/+5 2014-10-29clk: rockchip: change PLL setting for better clock jitterKever Yang1-0/+9 2014-10-01clk: rockchip: add restart handlerHeiko Stübner1-0/+1 2014-09-27clk: rockchip: add new clock-type for the cpuclkHeiko Stuebner1-0/+37 2014-09-02clk: rockchip: protect critical clocks from getting disabledHeiko Stübner1-0/+1 2014-07-13clk: rockchip: add clock controller for rk3288Heiko Stübner1-0/+9 2014-07-13clk: rockchip: add reset controllerHeiko Stübner1-0/+14 2014-07-13clk: rockchip: add clock type for pll clocks and pll used on rk3066Heiko Stübner1-0/+74 2014-07-13clk: rockchip: add basic infrastructure for clock branchesHeiko Stübner1-0/+250