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| author | Thierry Reding <treding@nvidia.com> | 2015-08-03 14:23:29 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-07-01 14:42:01 +0200 |
| commit | 25bb2cec88401a512c01adc8b815f8a579da2558 (patch) | |
| tree | f8d68ae61a35be1c4af1d2308a0e257c4573efbf /Documentation/devicetree/bindings/net | |
| parent | 0751bb5c44fe1aa9494ce259d974c3d249b73a84 (diff) | |
drm/tegra: sor: Factor out tegra_sor_set_parent_clock()
Switching the SOR parent clock can glitch if done while the clock is
enabled. Extract a common function that can be used to disable the
module clock, switch the parent and reenable the module clock.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/net')
0 files changed, 0 insertions, 0 deletions