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author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | 2016-08-04 15:35:41 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2016-08-08 11:54:40 +0100 |
commit | d936d527d241b606b0280034b3972b7825d3704c (patch) | |
tree | 6cab9099c9346cdd10ec584831c73763a4d4e5dc /Documentation/media | |
parent | 4c75225aa05753217a81ed10f136b86fb94c5922 (diff) |
ASoC: da7213: Improve 32KHz mode PLL locking
To aid PLL in locking on to a 32KHz MCLK, some register mods
are made during PLL configuration, and when enabling the DAI,
to achieve the full range of sample rates.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/media')
0 files changed, 0 insertions, 0 deletions