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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2016-06-08 19:55:50 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2016-06-10 16:14:43 +1000
commit36194812a4063dd2a72070aec3ee7890d135a587 (patch)
tree964bc8474f56fd52e9bbf98082ca2aee059790a5 /Documentation
parent8017ea35d33f9e0950d369773ab48bcb1efb9ba0 (diff)
powerpc/mm/radix: Update to tlb functions ric argument
Radix invalidate control (RIC) is used to control which cache to flush using tlb instructions. When doing a PID flush, we currently flush everything including page walk cache. For address range flush, we flush only the TLB. In the next patch, we add support for flushing only the page walk cache. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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