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authorImre Deak <imre.deak@intel.com>2016-07-01 16:40:04 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2016-07-25 08:14:31 +0200
commit6005085591a678f7193b98fe3c3d0464ac7dd5cf (patch)
treef926b5d1b362dc489565db8872005afc6f8aa538 /Documentation
parentfa95986095e39205ea2fb5b5dafe271bca7eb8d1 (diff)
drm/i915/gen9: Clean up MOCS table definitions
Use named struct initializers for clarity. Also fix the target cache definition to reflect its role in GEN9 onwards. On GEN8 a TC value of 0 meant ELLC but on GEN9+ it means the TC and LRU controls are taken from the PTE. No functional change, igt/gem_mocs_settings still passing after this change. v2: (Chris) - Add back the hexa literals for the entries. Add note that igt/gem_mocs_settings still passes. CC: Rong R Yang <rong.r.yang@intel.com> CC: Yakui Zhao <yakui.zhao@intel.com> CC: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Imre Deak <imre.deak@intel.com> Acked-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1467380406-11954-2-git-send-email-imre.deak@intel.com (cherry picked from commit e419899b7c19ef99e340e2b1ba585d82fd28c53b) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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