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author | Lv Zheng <lv.zheng@intel.com> | 2016-05-05 12:58:45 +0800 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2016-05-05 15:22:27 +0200 |
commit | 9222aa8234d9f07a70e815ddd3b44a97d673aff5 (patch) | |
tree | b0b8f78a412d8023d28b4f81319894a6aa0d7cb0 /Documentation | |
parent | b314a172ee968d45f72dffea68ab8af38aa80ded (diff) |
ACPICA: Executer: Introduce a set of macros to handle bit width mask generation
ACPICA commit c23034a3a09d5ed79f1827d51f43cfbccf68ab64
A regression was reported to the shift offset >= width of type.
This patch fixes this issue. BZ 1270.
This is a part of the fix because the order of the patches are modified for
Linux upstream, containing the cleanups for the old code. Lv Zheng.
Link: https://github.com/acpica/acpica/commit/c23034a3
Link: https://bugs.acpica.org/show_bug.cgi?id=1270
Reported-by: Sascha Wildner <swildner@gmail.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions