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authorAmitkumar Karwar <akarwar@marvell.com>2017-01-24 19:05:45 +0530
committerKalle Valo <kvalo@codeaurora.org>2017-01-28 09:10:04 +0200
commitcc37d8efd2ba3a4cf395a727935f920c00b6f1a2 (patch)
tree43131ae631b12d93cc23465bcb2912318e4c104e /drivers/usb/host/fotg210-hcd.c
parent3e66849865edca1d04c9c6227b9153e9bdbdaec0 (diff)
mwifiex: use pci_dma_sync_single* APIs
On some platforms, driver is unable read sleep cookie signature even if firmware has written it through DMA. The problem is fixed by using pci_dma_sync_single* APIs while reading DMA buffer shared with firmware. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/usb/host/fotg210-hcd.c')
0 files changed, 0 insertions, 0 deletions
mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'net/core/drop_monitor.c')