diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2017-01-29 15:08:09 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-01-30 22:05:43 -0500 |
| commit | 00300b2aac27556e2829cfd047b787af0f13b081 (patch) | |
| tree | 08cd7aa47a489f4122a3c1abaab7abf1eb0b68f5 /include/dt-bindings/clock/gxbb-clkc.h | |
| parent | 1a0bee6c1e788218fd1d141db320db970aace7f0 (diff) | |
sh_eth: add missing EESIPR bits
Renesas SH77{34|63} manuals describe more EESIPR bits than the current
driver. Declare the new bits with the end goal of using the bit names
instead of the bare numbers for the 'sh_eth_cpu_data::eesipr_value'
initializers...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/dt-bindings/clock/gxbb-clkc.h')
0 files changed, 0 insertions, 0 deletions