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authorArnd Bergmann <arnd@arndb.de>2017-02-08 22:24:19 +0100
committerDavid S. Miller <davem@davemloft.net>2017-02-09 16:59:57 -0500
commit15c2e102412d95af4fe88e5b28b3eba124545bbf (patch)
tree10d22782e23395f24862af66d0e2af980df09258 /include/soc/fsl/qe/qe_tdm.h
parent2cbf5b4212b1595449548f189a8fb2df0b25a03f (diff)
ARM: orion: remove unused wnr854t_switch_plat_data
The other instances of this structure got removed along with the MDIO device change, but this one was left behind and needs to be removed as well: arch/arm/mach-orion5x/wnr854t-setup.c:109:44: error: 'wnr854t_switch_plat_data' defined but not used [-Werror=unused-variable] static struct dsa_platform_data __initdata wnr854t_switch_plat_data = { Fixes: 575e93f7b5e6 ("ARM: orion: Register DSA switch as a MDIO device") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/soc/fsl/qe/qe_tdm.h')
0 files changed, 0 insertions, 0 deletions
i-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/xen/interface/io/pciif.h')