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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-06 14:52:10 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-06 14:52:10 +0100
commitcbf304e420da96992eae50bb6d51035681340ab8 (patch)
tree76f729910e5fdca468464004f94b70b6b3cca81e /net/ceph
parentd5adbfcd5f7bcc6fa58a41c5c5ada0e5c826ce2c (diff)
parenta9306a63631493afc75893a4ac405d4e1cbae6aa (diff)
parent6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (diff)
Merge branches 'pm-core-fixes' and 'pm-cpufreq-fixes'
* pm-core-fixes: PM / runtime: Avoid false-positive warnings from might_sleep_if() * pm-cpufreq-fixes: cpufreq: intel_pstate: Disable energy efficiency optimization cpufreq: brcmstb-avs-cpufreq: properly retrieve P-state upon suspend cpufreq: brcmstb-avs-cpufreq: extend sysfs entry brcm_avs_pmap
e mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'net/ipv4/cipso_ipv4.c')