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authorShannon Nelson <shannon.nelson@oracle.com>2017-02-13 10:57:00 -0800
committerDavid S. Miller <davem@davemloft.net>2017-02-14 13:04:09 -0500
commitfd263fb6e718c5bdf35cbc1de4f781c71794d2a4 (patch)
tree8569adf9d2f8d2ebc2db0fb5cd109127ec08d129 /net/rxrpc/conn_service.c
parentf2f3e210bffe5c8f8b30d0b0c7b0f733ff5db334 (diff)
sunvnet: add memory barrier before check for tx enable
In order to allow the underlying LDC and outstanding memory operations to potentially catch up with the driver's Tx requests, add a memory barrier before checking again for available tx descriptors. Signed-off-by: Shannon Nelson <shannon.nelson@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/rxrpc/conn_service.c')
0 files changed, 0 insertions, 0 deletions
link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/broadwellx/other.json')